Binary Signal Generator Using Frequency-Based Differential Testing
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Solution Overview
Problem
Existing automatic test equipment (ATE) for semiconductor circuits lacks the ability to force binary states (0 and 1) using a difference in test signal frequency, relying instead on voltage level differences for digital testing.
Innovation Solution
A binary signal generator system comprising a programmable waveform generator coupled with a differential output amplifier, utilizing two different frequencies (f1 and f0) to generate a differential output signal, where the programmable waveform generator includes registers for storing frequency bits and a multiplexer to toggle between these frequencies, and a digital-to-analog converter to produce modulated signals that are phase-shifted by 180 degrees.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If voltage level differences are used to indicate binary states in conventional ATE systems, then digital testing capability is provided, but the ability to test differential inputs using frequency differences is lost
Solution Approach 1:
The patent changes the fundamental parameter used to represent binary states from voltage level to frequency. The waveform generator is configured to output different frequencies (first frequency for binary 1, second frequency for binary 0) instead of different voltage levels, enabling frequency-based binary state representation that is suitable for testing differential inputs
2Adaptability or versatility
If conventional voltage-based binary states are used, then simple logic analysis is achieved, but flexible interface with multiple logic families and characterization of operating bounds is limited
Solution Approach 1:
The system uses frequency as the distinguishing parameter for binary states instead of voltage. This allows the test system to interface with multiple logic families by adjusting frequency parameters rather than being constrained to specific voltage levels, thereby improving adaptability while maintaining the ability to precisely characterize operating bounds through frequency measurement
Data Source
AI summary
A binary signal generator circuit includes a programmable waveform generator (PWG) having an input stage for receiving a digital data stream, a serial clock signal for controlling receipt of the digital data, a frequency synchronization and a clock signal. The PWG includes registers including a first and second register for storing bits representing a first frequency (f1) and for storing bits representing a zero frequency (fo), respectively. A MUX receives a control signal based on the digital data for toggling between bits representing f1 and fo coupled to a digital-to-analog converter (DAC) with an output providing a modulated signal that toggles between essentially f1 and essentially fo. A differential output amplifier receives the modulated signal for generating a first and second amplified signal modulated between essentially f1 and essentially fo. The first and second amplified signal are phase shifted relative to one another, taken together providing a differential signal.