Binary Signal Transformation for Memory State Differentiation
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Solution Overview
Problem
Existing memory technologies face challenges in reliably differentiating between states due to small read windows and changes in memory properties over time, especially between 0-states and 1-states, which affects the robustness and reliability of state differentiation.
Innovation Solution
The use of complementary memory cells and a method to transform binary signals read from memory into a second binary signal or predefined signal based on k-out-of-n codes, allowing for efficient identification of the fastest states and reducing the need to wait for slower states to be determined, thereby improving state differentiation and code word detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If binary signals are read directly from memory cells, then the read-out process is simple, but the reliability of state differentiation deteriorates due to small read windows and changes in memory properties over time
Solution Approach 1:
The patent transforms binary signals from memory cells into a different domain (time domain or coded domain) by changing the representation parameters. Memory cell states are read and transformed into code words where 0-states and 1-states are represented by distinct patterns, making differentiation more reliable despite small read windows and memory property changes over time
Solution Approach 2:
The patent introduces an intermediary transformation process between memory cell reading and state differentiation. A logic circuit or transformation mechanism converts raw binary signals into transformed signals with enhanced distinguishability, acting as a mediator that improves reliability without requiring direct comparison of difficult-to-differentiate memory states
2Productivity
If the system waits for all states to be determined before processing, then complete information is available, but the processing time increases due to slower states
Solution Approach 1:
The patent performs preliminary transformation of binary signals into code words before complete state determination is necessary. By encoding states into k-out-of-n code format, the system can identify and process valid code words even when not all memory cell states have fully stabilized, enabling earlier processing without significant information loss
Solution Approach 2:
The patent implements feedback mechanisms where transformed signals are validated against code word criteria. If a valid k-out-of-n code word is detected, processing can proceed; otherwise, the system continues monitoring until valid states are determined, creating a feedback loop that balances speed with information completeness
3Adaptability or versatility
If more code words are supported in the k-out-of-n code, then the information capacity increases, but the complexity of transformation and validation increases
Solution Approach 1:
The patent segments the transformation logic into modular components that handle k-out-of-n code encoding and validation. The transformation circuit is divided into separate stages for encoding, validation, and processing, allowing support for multiple code word varieties while managing complexity through functional segmentation and reusable modular blocks
Data Source
AI summary
What is specified is a method for transforming a first binary signal read from a memory, wherein the first binary signal is transformed into a second binary signal provided that the first binary signal is a code word or a predefined code word of a k-out-of-n code, wherein the first binary signal is transformed into a predefined signal provided that the first binary signal is not a code word or is not a predefined code word of the k-out-of-n code, wherein the predefined signal is different than the second binary signal. A corresponding device is furthermore specified.