Binary Translation for Asymmetric Multicore Dispatching

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Solution Overview

Problem

Asymmetric 32-bit SoCs, where big cores only support 64-bit ISAs, restrict legacy 32-bit applications to run on little cores, leading to performance degradation due to limited processing capability.

Innovation Solution

Implementing binary translation to convert 32-bit instructions to 64-bit instructions, allowing legacy 32-bit applications to run on high-performance big cores, while using a dispatching service to determine the appropriate execution path based on the application's ISA and computational requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If big cores only support 64-bit ISAs, then performance and efficiency of big cores are optimized, but legacy 32-bit applications are restricted to run on little cores causing performance degradation

Engineering Contradiction:

ImproveperformanceVSAvoidISA compatibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces a binary translation layer as an intermediary between 32-bit applications and 64-bit cores. The dispatching service detects 32-bit applications and translates their instructions to 64-bit equivalents, enabling them to run on high-performance big cores while maintaining backward compatibility. This mediator resolves the contradiction by allowing both performance optimization and legacy application support.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the instruction set architecture parameter from 32-bit to 64-bit through binary translation. By dynamically translating 32-bit instructions into 64-bit instructions at runtime, the system allows legacy applications to execute on 64-bit optimized cores, thus improving performance while maintaining compatibility with older software.

Inventive Principle:

Principle #35Parameter changes

2Productivity

If binary translation is performed for all 32-bit applications, then more applications can run on big cores, but system overhead increases

Engineering Contradiction:

Improveapplication execution capabilityVSAvoidtranslation overhead

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent applies partial action by performing binary translation only for compute-bound 32-bit applications that benefit from running on big cores, rather than translating all 32-bit applications. The dispatching service analyzes application characteristics and selectively translates only those that will gain performance benefits, reducing unnecessary translation overhead while still improving overall system productivity.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS20250028537A1Binary translation and task dispatching for asymmetric multicore processors

Publication Date: 2025.01.23 MEDIATEK INC

AI summary

A computing device receives an application start request for an application through a dispatching service. The computing device determines whether the application uses a first instruction set architecture (ISA) or a second ISA using the dispatching service. The computing device determines whether the application is compute-bound or non-compute-bound in response to determining that the application uses the second ISA. The computing device performs binary translation to convert instructions based on the second ISA from the application to instructions based on the first ISA in response to determining that the application is compute-bound. The computing device executes the instructions based on the first ISA on one or more cores supporting the first ISA.