Binary Translation Enregistering Memory Locations for Performance
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Solution Overview
Problem
Binary translation techniques fail to fully utilize additional registers in target hardware architectures, leading to suboptimal performance due to frequent memory accesses, as they do not re-optimize object code to leverage the increased register resources.
Innovation Solution
A system that identifies memory accesses in object code and rewrites instructions to use additional registers, while moderating access to ensure thread safety and preserve program semantics by using a translation lookaside buffer to manage thread identifiers and protect enregistered memory locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If binary translation is used to translate object code to a new hardware implementation, then code portability across different architectures is improved, but the additional registers in the target architecture are not utilized, leading to suboptimal performance
Solution Approach 1:
The system dynamically analyzes the translated object code to identify memory access patterns and selectively enregisters specific memory locations to registers based on runtime characteristics. This dynamic adaptation allows the system to leverage additional registers only when beneficial, maintaining code portability while improving execution performance through selective optimization.
Solution Approach 2:
The system changes the parameter of memory access by transforming memory location references into register references for frequently accessed locations. This parameter change from memory-addressing to register-accessing mode exploits the additional registers in the target architecture, improving productivity without compromising the portability achieved through binary translation.
2Speed
If instructions are rewritten to access registers instead of memory locations, then memory access latency is reduced and performance is improved, but thread safety may be compromised due to stale values in enregistered memory locations
Solution Approach 1:
The system implements a feedback mechanism using a translation lookaside buffer (TLB) that tracks which threads have accessed which enregistered memory locations. When a thread attempts to access an enregistered memory location, the system checks the TLB to determine if the current register value is stale (i.e., if another thread has modified the corresponding memory location). This feedback ensures thread safety by detecting and handling stale values, maintaining reliability while preserving the performance benefits of register access.
Solution Approach 2:
The translation lookaside buffer serves as an intermediary structure between the register file and memory system. It mediates access to enregistered memory locations by storing metadata about which threads have accessed which locations, enabling the system to detect stale values and coordinate between threads. This intermediary mechanism preserves thread safety without eliminating the performance advantages of register-based access.
Data Source
AI summary
One embodiment of the present invention provides a system that improves program performance by enregistering memory locations. During operation, the system receives program object code which has been generated to use a specified number of registers that are available for a given target hardware implementation. Next, the system translates this object code to execute on a second hardware implementation which includes more registers than the first hardware implementation. The system uses these additional registers to improve the performance of the translated object code for the second hardware implementation. More specifically, the system identifies a memory access in the object code, and then rewrites an instruction associated with this memory access to access an available register instead of the original target memory location. To preserve program semantics, the system subsequently moderates accesses to the memory location to ensure that no threads access a stale value in the enregistered memory location.