Binary Tree Memory Addressing for Host Memory Buffer Latency
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Solution Overview
Problem
The host memory buffer (HMB) feature in data storage devices introduces latency due to inefficient data storage and security vulnerabilities, such as replay attacks, when storing binary tree data, as it requires numerous read and write commands and is susceptible to external memory attacks.
Innovation Solution
A computer-implemented method and apparatus for storing binary tree data in memory by determining specific memory addresses for parent, first child, and second child node data, ensuring the parent node data is stored between its child nodes, using a binary tree memory assignment function to optimize storage and reduce latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If binary tree data is stored using conventional memory addressing, then data can be stored in host memory buffer, but numerous read and write commands are required causing increased latency
Solution Approach 1:
The binary tree data structure is segmented into parent nodes and child nodes with specific addressing patterns. By dividing the storage into hierarchical segments (parent/child relationships) and assigning addresses systematically (even addresses for left children, odd addresses for right children), the system reduces the need for numerous individual read/write commands through more efficient data organization and retrieval.
2Device complexity
If host memory buffer is used for data storage, then DRAM size and cost are reduced, but security vulnerabilities such as replay attacks increase
Solution Approach 1:
The system performs preliminary actions by establishing a specific memory addressing scheme before data storage operations. By pre-defining the address allocation pattern (parent node addresses between child node addresses, even/odd address conventions for left/right children), the system creates a structured framework that enables both efficient access and potential security measures against replay attacks, rather than addressing security concerns after the fact.
3Productivity
If parent node data is stored without specific address relationships, then storage is simpler, but data fetching efficiency decreases
Solution Approach 1:
The system changes the addressing parameter structure by establishing specific mathematical relationships between parent and child node addresses. Parent nodes are assigned addresses that fall between the addresses of their child nodes, with left children receiving even addresses and right children receiving odd addresses. This parameter transformation creates an optimized addressing scheme that improves data fetching efficiency while maintaining manageable complexity through systematic address determination.
Data Source
AI summary
Disclosed herein is a computer-implemented method for storing binary tree data in memory. The binary tree data comprises parent node data, first child node data and second child node data. The computer-implemented method comprises determining a first child node memory address, the first child node memory address being less than a parent node memory address; determining a second child node memory address, the second child node memory address being greater than the parent node memory address; storing the parent node data at the parent node memory address; storing the first child node data at the first child node memory address; and storing the second child node data at the second child node memory address.