Binary Vector Operations for Faster AI Model Inference

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Solution Overview

Problem

Conventional AI models rely on matrix multiplication, which is computationally intensive and resource-consuming, often requiring graphical processing units, increasing execution costs and time.

Innovation Solution

Convert multi-bit components of vectors in AI models to single-bit elements using exclusive-or operations and random probability distributions to reduce computational complexity, enabling efficient processing on central processing units.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If matrix multiplication is performed using conventional AI models, then computational accuracy is maintained, but computational time and resource consumption increase substantially

Engineering Contradiction:
Improvecomputational accuracyVSAvoidcomputational time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent changes the parameter representation from multi-bit floating-point numbers to single-bit quantized values. This parameter transformation enables the use of exclusive-or operations instead of traditional matrix multiplication, dramatically reducing computational time while maintaining acceptable accuracy through probabilistic interpretation of the binary results

Inventive Principle:
Principle #35Parameter changes

2Productivity

If graphical processing units are used to perform matrix multiplication, then computational speed is improved, but execution cost increases

Engineering Contradiction:
Improvecomputational speedVSAvoidexecution cost
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent substitutes the mechanical computing system (GPU-based matrix multiplication) with a different computational approach using single-bit operations and exclusive-or logic. This substitution enables standard CPUs to achieve comparable or superior performance without requiring specialized GPU hardware, thereby reducing execution cost and device complexity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If multi-bit components are converted to single-bit elements, then computational complexity is reduced, but information retention may be compromised

Engineering Contradiction:
Improvecomputational complexityVSAvoidinformation retention
Core Design Contradiction:
Device complexityVSLoss of information

Solution Approach 1:

The patent introduces random probability distributions as an intermediary mechanism between the single-bit operations and the final computational result. This intermediary allows the system to recover probabilistic information that would otherwise be lost in binary quantization, enabling accurate predictions despite using simplified single-bit representations throughout the computation

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4657246A1Compressing and transforming vector operations in an ai model
Publication Date: 2025.12.03 MICROSOFT TECHNOLOGY LICENSING LLC
  • EP4657246A1 patent drawingFigure 1
  • EP4657246A1 patent drawingFigure 2
  • EP4657246A1 patent drawingFigure 3

AI summary

Techniques are described herein that are capable of compressing and transforming vector operations in an AI model. First output multi-bit elements (MBEs) are generated by combining input single-bit components (SBCs) representing an input token in an AI prompt and first SBCs representing a first layer of the AI model using an exclusive-or operation. The first output MBEs are transformed into first output single-bit elements (SBEs) using a random probability distribution. Second output MBEs are generated by combining intermediate SBEs corresponding to intermediate MBEs derived from the first output SBEs and second SBCs representing a second layer of the AI model using the exclusive-or operation. A response to the AI prompt is generated to include an output token corresponding to a combination of a norm of the intermediate MBEs, a norm of second multi-bit components from which the second SBCs are derived, and a representation of the second output MBEs.