BIOS Bus Allocation via Temporary Values

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Solution Overview

Problem

Conventional UEFI BIOS systems are limited in reallocating buses during early initialization phases, leading to inefficiencies as they cannot redistribute buses from underutilized stacks to stacks that require more, due to resource constraints and discovery challenges in the initialization process.

Innovation Solution

The proposed Information Handling System employs a BIOS engine that assigns temporary bus values to devices connected to root ports, detects links, determines a bus allocation count, and allocates buses based on this count during the boot process, allowing for dynamic allocation that matches actual system configuration needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If buses are allocated evenly between stacks during early initialization, then the initialization process can proceed with simple resource distribution, but stacks that require more buses cannot receive additional resources from underutilized stacks

Engineering Contradiction:
Improveease of bus allocationVSAvoidadaptability of bus allocation
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent applies preliminary action by assigning temporary bus values to devices during early initialization (PEI phase) before the UEFI BIOS fully discovers devices. This temporary assignment enables the system to perform preliminary bus allocation based on detected links, allowing stacks to receive appropriate bus resources early in the boot process rather than waiting for complete device discovery. The temporary bus values serve as placeholders that facilitate subsequent reallocation based on actual device connections.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If bus allocation is performed early in the initialization process, then performance and security considerations can be addressed, but the BIOS cannot re-allocate buses from underutilized stacks to stacks that require more buses

Engineering Contradiction:
Improvereliability of early bus allocationVSAvoidefficiency of bus utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamics by enabling the BIOS to dynamically re-allocate buses after device discovery completes. The system transitions from static even-split allocation to dynamic allocation based on actual device connections. The BIOS detects which stacks have underutilized buses and re-allocates those buses to stacks with higher demands, optimizing overall system productivity while maintaining the reliability benefits of early initialization.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies feedback by having the BIOS detect actual device links after temporary bus assignment and use this information to determine accurate bus allocation counts. The system uses feedback from device discovery to adjust and optimize bus distribution, ensuring that buses are allocated based on actual connectivity rather than assumptions made during early initialization.

Inventive Principle:
Principle #23Feedback

3Measurement precision

If temporary bus values are assigned to devices during boot process, then the BIOS can detect actual links and determine accurate bus allocation counts, but this requires additional processing steps

Engineering Contradiction:
Improveprecision of bus allocation measurementVSAvoidcomplexity of bus allocation process
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses temporary bus values as intermediaries during the boot process. These temporary assignments act as a mediator between early initialization requirements and final bus allocation decisions. The temporary bus values enable the BIOS to detect actual device links and measure connectivity accurately without committing to final allocation prematurely. This intermediary step simplifies the overall process by providing a structured approach to measurement and reallocation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10824471B2Bus allocation system
Publication Date: 2020.11.03 DELL PROD LP
  • US10824471B2 patent drawing
  • US10824471B2 patent drawing
  • US10824471B2 patent drawing

AI summary

A bus allocation system includes at least one connector coupled to a plurality of devices, and a processing subsystem that includes at least one root port that is coupled to the at least one connector. The processing system executes instructions that are stored on a memory subsystem in order to provide a Basic Input Output System (BIOS) that is configured, during a boot process, to assign temporary bus values to each of the plurality of devices that are coupled to the connector. Based on the assigned temporary bus values, the BIOS detects each link that couples each of the plurality of devices to the connector, and determines a bus allocation count based on the detected links. The BIOS then allocates a number of buses for the at least one root port based on the bus allocation count.