Runtime BIOS Chipset Reconfiguration for USB-C Port Adaptation
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Solution Overview
Problem
The static configuration of chipset devices in information handling systems limits post-factory customization options for OEMs, as a single BIOS image cannot support multiple Flash Descriptors or dynamically choose configurations at runtime, hindering the ability to offer different USB port configurations like USB3.2 Gen2×1 and Gen2×2.
Innovation Solution
Implementing a method that auto-switches the chipset configuration at runtime by using USB Power Delivery (PD) firmware and BIOS to detect peripheral devices and adjust settings, allowing a single BIOS to support both USB3.2 Gen2×1 and Gen2×2 configurations through runtime reconfiguration based on capability information from connected devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single BIOS image is used to support multiple Front I/O package options, then system simplicity and manufacturing cost are reduced, but the static Flash Descriptor configuration prevents dynamic adaptation to different USB subsystem versions
Solution Approach 1:
The patent transforms the static BIOS configuration into a dynamic system by introducing runtime detection and reconfiguration capabilities. The BIOS initially configures the chipset based on the Flash Descriptor, then detects the actual Front I/O package type during runtime and reconfigures the USB subsystem accordingly. This allows a single BIOS image to adapt to multiple package options (Base and Upsell) without requiring multiple Flash Descriptors or BIOS images.
Solution Approach 2:
The patent changes the configuration parameters of the USB subsystem at runtime based on detected device capabilities. The BIOS modifies chipset configuration parameters such as USB port speed, connector type, and PD controller settings after detecting which Front I/O package is installed. This parameter reconfiguration enables the system to support both USB 3.2 Gen 1 and Gen 2 configurations with a single BIOS image.
2Manufacturing precision
If multiple Flash Descriptors are created to support different USB configurations, then configuration accuracy for each package type is improved, but the requirement for multiple BIOS images increases manufacturing complexity
Solution Approach 1:
The patent makes the single BIOS image universal by enabling it to handle multiple configuration scenarios. The BIOS contains the capability to detect different Front I/O package types and automatically reconfigure the USB subsystem accordingly. This multi-functionality eliminates the need for separate BIOS images for Base and Upsell packages, simplifying manufacturing while maintaining configuration accuracy through runtime adaptation.
Solution Approach 2:
The system performs self-configuration by automatically detecting the installed Front I/O package type and adjusting its own USB subsystem settings without external intervention. The BIOS reads capability information from the detected device, determines the appropriate configuration, and reconfigures the chipset autonomously. This self-service approach ensures accurate configuration for each package type while using a single BIOS image.
3Speed
If USB Power Delivery controllers are added to support higher speeds, then USB port speed capability is improved, but signal integrity degradation occurs over the extended cable lengths required for faster data rates
Solution Approach 1:
The patent introduces USB Power Delivery (PD) controllers as intermediary devices between the USB host and peripheral devices. These PD controllers are positioned at strategic points in the USB subsystem to actively manage and regenerate signals. By inserting these intermediary PD controllers, the system can maintain signal integrity over the longer cable lengths required for USB 3.2 Gen 2 operation, thereby enabling higher speeds without sacrificing reliability.
Data Source
AI summary
A method for configuring a peripheral bus of an information handling system performs, as part of a boot sequence, an initial configuration of a chipset setting pertaining to the bus based on a descriptor stored in a nonvolatile storage resource. After an operating system is loaded, a controller detects a peripheral device connecting to the bus and responds by performing a runtime configuration of the chipset setting based on capability information obtained from the peripheral device. The peripheral bus may comprise a USB pipe and a USB-C type connector, wherein the peripheral device is detected by a USB power delivery (PD) controller based on configuration channel (CC) pins of the USB-C connector. The PD controller may signal the chipset and send the device’s capability information to the chipset. The PD controller may assert a PMCALERT# signal of the chipset’s and send the capability information via a system management link (SMLink1).