BIOS Error Logging via Memory-Mapped Buffer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In high-performance computing systems, identifying and repairing faulty components can be time-consuming due to the intrusive nature of existing error logging methods, which slow down performance-critical systems and complicate the analysis of errors across multiple components.
Innovation Solution
A computing system architecture that includes memory-mapped buffers in each computing node for error data logging, allowing error data to be collected and analyzed independently of the operating system, with a management controller extracting data from these buffers and sending it to a system management node for comprehensive analysis, while minimizing performance impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error logging is performed by software running on the operating system, then error detection and logging capability is improved, but system performance is degraded
Solution Approach 1:
The error logging function is segmented from the operating system software and implemented in hardware at the BIOS level. Each computing node has dedicated error registers and logging mechanisms that operate independently from the OS, allowing error detection without software overhead while maintaining system performance.
Solution Approach 2:
A management controller acts as an intermediary between computing nodes and the system management node. The management controller collects error data from multiple nodes and transmits it centrally, eliminating the need for each node to maintain separate error logging software and reducing overall system overhead.
2Loss of information
If error data is collected from multiple computing nodes spanning different chassis, then comprehensive error analysis capability is improved, but analysis complexity is increased
Solution Approach 1:
Error data from multiple computing nodes across different chassis is merged into a centralized repository at the system management node. This consolidation allows comprehensive error analysis in one location without requiring technicians to physically examine each node individually, reducing analysis complexity despite increased data volume.
Solution Approach 2:
The management controller serves as an intermediary that aggregates error data from multiple computing nodes before presenting it to the system management node. This intermediate aggregation layer simplifies the data structure and makes comprehensive error analysis more manageable.
3Measurement precision
If technicians analyze error data on many different components manually, then accurate fault identification is improved, but repair time is increased
Solution Approach 1:
Error data is continuously collected and stored in a centralized repository before any failure occurs. When a fault does occur, the pre-collected error data is already available for immediate analysis, eliminating the need for technicians to manually examine each component and significantly reducing repair time while maintaining accurate fault identification.
Data Source
AI summary
Error data is read from error registers and written into a buffer. A computing node uses a BIOS to read the error data, rearm the error register and write the data into a memory mapped buffer. A hub chip supports creation of a shared memory system of computing nodes. A management controller in the computing node extracts error data from the buffer. The error data preferably consists essentially of the error register identifiers and the contents of the error registers. A system management node receives the error data from the management controllers in the computing nodes. The system management node may be coupled to but separate from the computing nodes.