BIOS Integrity Verification via Event-Based Interrupts
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Solution Overview
Problem
Existing methods for securing a computing system's BIOS struggle to balance accessibility for upgrades with protection against unauthorized tampering, as moving BIOS storage onto the microprocessor die complicates upgrades and encryption-based solutions degrade system performance.
Innovation Solution
A system that includes a BIOS ROM with plaintext contents and an encrypted message digest, using a symmetric key algorithm, coupled with an event detector and tamper detector to interrupt and verify the integrity of the BIOS during state changes, ensuring only authorized operation by comparing message digests and decrypting a minimal encrypted message digest.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If BIOS storage is moved onto the microprocessor die, then protection against tampering is improved, but ease of upgrade deteriorates
Solution Approach 1:
The invention separates the BIOS storage into two distinct components: a secure, tamper-resistant microprocessor die containing the cryptographic key and verification logic, and an external, upgradeable BIOS chip. This segmentation allows the microprocessor to provide security while the external chip remains easily replaceable for upgrades.
Solution Approach 2:
The invention introduces an intermediary verification mechanism where the microprocessor's crypto/hash unit acts as a mediator between the BIOS chip and the system. The BIOS is encrypted and stored externally, but the microprocessor verifies its integrity through cryptographic hashing before execution, providing both security and upgradeability.
2Reliability
If encryption-based solutions are used to protect BIOS, then protection against tampering is improved, but system performance deteriorates
Solution Approach 1:
The invention performs the computationally intensive cryptographic hashing operation in advance during system initialization, before the BIOS is executed. The BIOS is encrypted and stored externally, and the hash verification is performed preliminarily to ensure integrity, avoiding performance degradation during normal operation.
Solution Approach 2:
The invention replaces traditional mechanical or software-based BIOS protection mechanisms with a dedicated hardware crypto/hash unit in the microprocessor. This specialized hardware component performs cryptographic operations efficiently, providing strong security without degrading overall system performance.
Data Source
AI summary
An apparatus is provided for protecting a basic input/output system (BIOS) in a computing system. The apparatus includes a BIOS read only memory (ROM), an event detector, and a tamper detector. The BIOS ROM has BIOS contents that are stored as plaintext, and an encrypted message digest, where the encrypted message digest comprises an encrypted version of a first message digest that corresponds to the BIOS contents, and where and the encrypted version is generated via a symmetric key algorithm and a key. The event detector is configured to generate a BIOS check interrupt that interrupts normal operation of the computing system upon the occurrence of an event, where the event includes one or more occurrences of a change in system state. The tamper detector is operatively coupled to the BIOS ROM and is configured to access the BIOS contents and the encrypted message digest upon assertion of the BIOS check interrupt, and is configured to direct a microprocessor to generate a second message digest corresponding to the BIOS contents and a decrypted message digest corresponding to the encrypted message digest using the symmetric key algorithm and the key, and is configured to compare the second message digest with the decrypted message digest, and configured to preclude the operation of the microprocessor if the second message digest and the decrypted message digest are not equal. The microprocessor includes a dedicated crypto/hash unit disposed within execution logic, where the crypto/hash unit generates the second message digest and the decrypted message digest, and where the key is exclusively accessed by the crypto/hash unit. The microprocessor further has a random number generator disposed within the execution logic, where the random number generator generates a random number at completion of a current BIOS check, which is employed by the event detector to randomly set a number of occurrences of the event that are to occur before a following BIOS check.