BIOS Memory Clock Frequency Auto-Adjustment for Boot Stability

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Solution Overview

Problem

Conventional computer devices face challenges in automatically adjusting memory clock frequency, leading to unsuccessful boot processes and inconvenience for users, especially when memory overclocking fails or defective memory is encountered, requiring manual BIOS settings and restarts.

Innovation Solution

A method where the BIOS automatically adjusts the memory clock frequency by lowering it within a default frequency range, considering factors like operating voltage, RAS-to-CAS delay, CAS latency, and slew rate, to ensure successful booting, operating the memory at a minimum threshold frequency if necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory clock frequency is set to a high value (overclocking) to improve efficiency, then the processing speed and efficiency are improved, but the system stability deteriorates and boot failures occur

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The BIOS dynamically adjusts the memory clock frequency based on boot success feedback. When a boot failure occurs, the BIOS automatically lowers the memory clock frequency in subsequent boot attempts, transforming the static frequency setting into a dynamic adaptation process that responds to system stability conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the memory clock frequency parameter automatically based on boot success or failure. The BIOS monitors whether the boot process succeeds and adjusts the frequency parameter accordingly, lowering it when failures occur to restore system stability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the memory clock frequency is manually adjusted by the user to resolve boot failures, then the system stability may be improved, but the ease of operation deteriorates due to manual intervention requirements

Engineering Contradiction:
Improvesystem stabilityVSAvoiduser convenience
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The BIOS performs self-service by automatically detecting boot failures and adjusting the memory clock frequency without requiring user intervention. The system monitors its own boot status and autonomously modifies the frequency setting, eliminating the need for manual BIOS reconfiguration

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The invention implements a feedback mechanism where the BIOS monitors boot success or failure and uses this feedback to automatically adjust the memory clock frequency. The boot result feeds back into the frequency control loop, enabling automatic adaptation without user involvement

Inventive Principle:
Principle #23Feedback

3Reliability

If the memory clock frequency is repeatedly adjusted through manual BIOS settings and restarts, then the system may achieve stable booting, but the time consumption increases significantly

Engineering Contradiction:
Improveboot successVSAvoidtime for repeated adjustments
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The BIOS performs preliminary frequency adjustment preparation by automatically lowering the memory clock frequency before the next boot attempt when a failure is detected. This preliminary action prevents the need for manual intervention and reduces the time required to achieve successful booting

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system performs self-service frequency adjustment automatically during the boot process, eliminating the time-consuming manual intervention cycle. The BIOS autonomously detects failures and adjusts frequencies, significantly reducing the total time required to achieve stable booting

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10922261B2Memory clock frequency adjusting method, mainboard, and computer operating system
Publication Date: 2021.02.16 GIGA BYTE TECH CO LTD
  • US10922261B2 patent drawing
  • US10922261B2 patent drawing
  • US10922261B2 patent drawing

AI summary

A memory clock frequency adjusting method suitable for a computer device is provided. The computer device includes a basic input output system (BIOS) and a memory. The memory clock frequency adjusting method includes following steps. A boot process of the computer device is executed, and the memory is operated at a memory clock frequency set by the BIOS. Whether the computer device is successfully booted is determined by the BIOS to decide whether the boot process of the computer device is to be re-executed. A setting of the memory clock frequency is adjusted by the BIOS when the computer device re-executes the boot process to lower the memory clock frequency, so that the memory is operated at the lowered memory clock frequency. In addition, a mainboard and a computer operating system applying the memory clock frequency adjusting method are also provided.