BIOS Controlled Peripheral Port Power Management

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Solution Overview

Problem

Peripheral devices connected to a computing device via USB ports often require continuous power, even when the device is in a sleep state, leading to unnecessary power consumption and potential loss of functionality.

Innovation Solution

The system allows users to selectively power peripheral device ports through firmware settings, enabling or disabling power during the processor's sleep states, thereby conserving energy and maintaining device functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If peripheral devices are continuously powered through USB ports, then device functionality is maintained, but power consumption increases

Engineering Contradiction:
Improvedevice functionalityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic power management by allowing the system to transition peripheral device ports between powered and unpowered states based on operational needs. The BIOS configuration enables selective powering during sleep states, allowing the system to adapt power delivery dynamically rather than maintaining a static powered state, thus resolving the contradiction between maintaining functionality and reducing power consumption.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If processor enters sleep state to conserve energy, then power consumption is reduced, but peripheral device functionality is lost

Engineering Contradiction:
Improvepower consumptionVSAvoidperipheral device functionality
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent segments the power management of the system into two independent parts: the processor power state and the peripheral device port power state. This allows the processor to enter sleep state while peripheral device ports can independently remain powered according to BIOS configuration, enabling the system to conserve processor energy while maintaining peripheral functionality through separate power control.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If peripheral device ports are powered during sleep state, then device accessibility is maintained, but energy conservation is reduced

Engineering Contradiction:
Improvedevice accessibilityVSAvoidenergy conservation
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent implements dynamic power management by allowing the system to transition peripheral device ports between powered and unpowered states based on operational needs. The BIOS configuration enables selective powering during sleep states, allowing the system to adapt power delivery dynamically rather than maintaining a static powered state, thus resolving the contradiction between maintaining functionality and reducing power consumption.

Inventive Principle:
Principle #15Dynamics

4Loss of energy

If peripheral device ports are unpowered during sleep state, then energy is conserved, but device accessibility is lost

Engineering Contradiction:
Improveenergy conservationVSAvoiddevice accessibility
Core Design Contradiction:
Loss of energyVSEase of operation

Solution Approach 1:

The patent segments the power management of the system into two independent parts: the processor power state and the peripheral device port power state. This allows the processor to enter sleep state while peripheral device ports can independently remain powered according to BIOS configuration, enabling the system to conserve processor energy while maintaining peripheral functionality through separate power control.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9213399B2BIOS controlled peripheral device port power
Publication Date: 2015.12.15 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US9213399B2 patent drawing
  • US9213399B2 patent drawing
  • US9213399B2 patent drawing

AI summary

A BIOS controlled peripheral device port power device is described. The device includes a processor and at least one peripheral device port. The processor powers up a host controller in preparation for the processor to enter a sleep state. The processor also places the processor in the sleep state after the host controller is powered up. The processor also selectively powers the at least one peripheral device port by the host controller when the processor is in the sleep state according to at least one setting stored in the processor.