BIOS POST Memory Testing With Selective Module Scans
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Solution Overview
Problem
Existing memory testing processes, such as the Intel Advanced Memory Test (AMT), are time-consuming due to the need for system reboots and the requirement to test all memory modules, even after repairs, which prolongs the overall testing and fix time in server manufacturing.
Innovation Solution
A system that allows memory testing during the BIOS power-on self-test (POST) stage, enabling selective testing of specific memory modules through BIOS configuration, with results stored in non-volatile memory accessible by the Baseboard Management Controller (BMC) for immediate review without rebooting into the operating system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the Advanced Memory Test (AMT) is enabled via BIOS setup menu and executed during boot-up, then memory testing capability is provided, but the system requires rebooting which extends testing time
Solution Approach 1:
The patent applies preliminary action by enabling the Advanced Memory Test routine to be executed during the BIOS Power-On Self-Test (POST) stage before the operating system loads. This allows memory testing to occur in advance during system initialization, eliminating the need for separate reboot cycles dedicated to memory testing and reducing overall testing time.
Solution Approach 2:
The patent implements multi-functionality by integrating the Advanced Memory Test routine execution into the existing BIOS POST process. The BIOS system now serves dual purposes: performing standard POST functions and executing comprehensive memory testing, thereby eliminating the need for separate testing operations and reducing the number of required reboots.
2Reliability
If the AMT routine scans all memory in the system, then complete memory coverage is achieved, but subsequent tests after repair take as long as the initial test
Solution Approach 1:
The patent applies segmentation by dividing the memory testing process into two distinct modes: a comprehensive full-memory scan for initial testing and repair identification, and a targeted selective scan for follow-up testing of specific memory modules. This segmentation allows the system to maintain complete coverage when needed while improving efficiency during subsequent tests by focusing only on relevant memory sections.
Solution Approach 2:
The patent implements dynamics by making the memory test scope configurable and adaptable. The system can dynamically adjust between performing a complete scan of all memory modules or a selective scan of specific modules based on the testing stage and requirements. This dynamic approach allows optimization of testing efficiency while maintaining the capability for comprehensive coverage when necessary.
3Loss of information
If test results are checked in the Operating System using a vendor tool, then detailed results are accessible, but the process cannot check results during the BIOS POST stage
Solution Approach 1:
The patent applies preliminary action by storing the memory test results in non-volatile memory during the BIOS POST stage, before the operating system loads. This allows test results to be captured and preserved in advance, making them immediately accessible without requiring the system to boot into the operating system or wait for additional processing steps.
Solution Approach 2:
The patent introduces an intermediary mechanism by utilizing the Baseboard Management Controller (BMC) as a mediator between the memory test routine and the test results. The BMC provides an accessible interface (such as IPMI) that allows retrieval of test results stored in non-volatile memory, enabling early access to results without requiring full operating system initialization or vendor-specific tools.
Data Source
AI summary
A system and method for efficiently testing memory in a computer system is disclosed. A basic input output system (BIOS) is configured to execute an advanced memory test routine in the computer system. A power on self-test routine of the BIOS is run to execute the advanced memory test routine to test a volatile memory. Test result data from the advanced memory test routine is stored in a non-volatile memory.


