BIOS SPD Reporting via CXL Memory Expander Registers

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Solution Overview

Problem

Existing systems using the CXL protocol face inefficiencies in reporting asset information of memory banks due to the need for out-of-band access through BMC, which complicates the acquisition of SPD information from DIMMs, leading to low reporting efficiency.

Innovation Solution

Directly access SPD information from the configuration space register of the MXC using the BIOS, leveraging the CXL protocol, allowing in-band access and reporting to the CPU without BMC intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional I2C line with BMC is used to access SPD information, then compatibility with existing systems is maintained, but reporting efficiency and access speed deteriorate due to out-of-band access requirements

Engineering Contradiction:
Improvereporting efficiencyVSAvoidaccess path complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the SPD information access path from the traditional I2C/BMC out-of-band pathway and relocates it to the CXL in-band memory expansion pathway. The BIOS directly accesses SPD information through the CXL protocol via the MXC, eliminating the need for BMC intervention and IPMI commands, thus improving reporting efficiency while reducing access path complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

2Productivity

If CXL protocol with direct BIOS access is used, then reporting efficiency improves through in-band access, but compatibility with traditional systems deteriorates

Engineering Contradiction:
Improveaccess speedVSAvoidsystem compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent introduces the MXC (Memory Expansion Controller) as an intermediary device that bridges traditional memory interfaces and CXL protocol. The MXC maintains compatibility with traditional SPD information formats while enabling direct BIOS access through CXL, thus improving access speed without sacrificing system compatibility. The MXC acts as a translator between the CXL in-band access mechanism and traditional memory subsystems.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple access paths (I2C+BMC+IPMI) are used, then information can be acquired through multiple channels, but the number of steps and time required increases

Engineering Contradiction:
Improveinformation acquisition reliabilityVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the information acquisition process into two distinct pathways: traditional out-of-band access (I2C+BMC+IPMI) and new in-band access (CXL+BIOS). By creating separate access segments, the system allows the BIOS to directly access SPD information through CXL without involving BMC and IPMI, significantly reducing access time while maintaining information reliability through the standardized SPD format.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260010423A1Method and apparatus for reporting asset information, storage medium, and electronic device
Publication Date: 2026.01.08 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20260010423A1 patent drawing
  • US20260010423A1 patent drawing
  • US20260010423A1 patent drawing

AI summary

Embodiments of the present disclosure provide a method and apparatus for reporting asset information, a non-transitory computer readable storage medium, and an electronic device. The method for reporting asset information includes: reading, in a case where a target device supports memory expansion, Serial Presence Detect (SPD) information of a designated memory bank mounted to the target device from a configuration space register of a Memory Expander Controller (MXC) of the target device by means of a Basic Input Output System (BIOS), wherein the target device is a device that supports a Computer Express Link (CXL) protocol, which is an open interconnection standard; and reporting, in a case where target SPD information has been read, the target SPD information to a Central Processing Unit (CPU) of the target device as system asset information by means of the BIOS.