BIP Bit Error Detection for Ethernet Control Block Mismatch

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Solution Overview

Problem

Conventional BIP-8 bit error detection methods are inadequate for flexible Ethernet and X-Ethernet systems, where addition or deletion of blocks can lead to inconsistencies in BIP check results, causing incorrect bit error detection and link quality evaluation.

Innovation Solution

A method that involves receiving and comparing BIP check results from both sending and receiving devices, accounting for different types of control blocks (local fault, remote fault, idle, and low power idle) by adjusting bit positions in the BIP check results, and determining bit errors based on these comparisons to accurately assess bit error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional BIP-8 check method is used in flexible Ethernet or X-Ethernet systems, then the method can be applied to bit error collection, but block addition or deletion causes inconsistency between sending and receiving device BIP check results, leading to incorrect bit error detection

Engineering Contradiction:
Improveapplicability of BIP check methodVSAvoidbit error detection accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The receiving device performs preliminary identification of control blocks (such as idle blocks, low power idle blocks, local fault blocks, remote fault blocks) in the received bit stream before comparing BIP check results. This preliminary action allows the device to anticipate and compensate for expected BIP result differences caused by block additions or deletions, preventing false bit error detections while maintaining applicability to flexible Ethernet and X-Ethernet systems

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The method changes the parameter being compared from raw BIP check results to adjusted BIP check results that account for control block impacts. By modifying the comparison parameter to exclude known effects of block additions/deletions, the system maintains measurement precision while preserving adaptability to different Ethernet standards

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If BIP check results are directly compared without considering control block impacts, then the detection process is simple, but incorrect bit error detection occurs due to BIP result inconsistency caused by block addition or deletion

Engineering Contradiction:
Improvedetection process simplicityVSAvoidbit error detection reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The receiving device performs preliminary identification of control blocks (such as idle blocks, low power idle blocks, local fault blocks, remote fault blocks) in the received bit stream before comparing BIP check results. This preliminary action allows the device to anticipate and compensate for expected BIP result differences caused by block additions or deletions, preventing false bit error detections while maintaining applicability to flexible Ethernet and X-Ethernet systems

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary adjustment mechanism that mediates between the raw BIP check results from sending and receiving devices. By using control block identification as an intermediary step, the system translates the impact of block additions/deletions into predictable BIP result changes, allowing reliable comparison without increasing operational complexity significantly

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3723326B1Method and apparatus for detecting bit error
Publication Date: 2023.07.26 HUAWEI TECH CO LTD
  • EP3723326B1 patent drawingFigure 1
  • EP3723326B1 patent drawingFigure 2
  • EP3723326B1 patent drawingFigure 3A

AI summary

Embodiments of this application disclose a bit error detection method and apparatus. The method includes: receiving a first result obtained by a sending device by performing BIP check on a sent first to-be-checked bit stream; performing BIP check on a received second to-be-checked bit stream to obtain a second result, where the second to-be-checked bit stream is a bit stream received by a receiving device after the first to-be-checked bit stream is transmitted; detecting a type of a control block in the second to-be-checked bit stream, and determining a third result based on impact of the type of the control block on a BIP check result; comparing the first result, the second result, and the third result; and if the first result is different from the second result, the first result is different from the third result, and the second result is different from a predetermined result, determining that a bit error occurs when the first to-be-checked bit stream is transmitted. According to this application, applicability and accuracy of BIP bit error detection can be improved.