BIP Bit Error Detection Across Added or Deleted Ethernet Blocks

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Solution Overview

Problem

Conventional BIP-8 bit error detection methods are insufficient for flexible Ethernet and X-Ethernet systems due to the addition or deletion of blocks during transmission, leading to inconsistencies in error detection and incorrect bit error rate calculations.

Innovation Solution

A method and apparatus for bit error detection that involves receiving and comparing BIP check results from both the sending and receiving devices, accounting for control blocks like local fault, remote fault, idle, and low power idle blocks, and adjusting results accordingly to accurately determine bit errors, even in the presence of block additions or deletions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional BIP-8 check method is used without considering control blocks, then the detection method is simple and applicable to traditional Ethernet, but it produces incorrect error detection results when blocks are added or deleted in flexible Ethernet and X-Ethernet systems

Engineering Contradiction:
Improvebit error detection accuracyVSAvoiddetection method complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the bit stream into different types of blocks (control blocks and data blocks) and applies different processing rules to each segment. Control blocks are identified and excluded from BIP check calculations, while data blocks undergo normal BIP checking. This segmentation resolves the contradiction by maintaining simple processing for each segment type while achieving accurate overall error detection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary identification and classification of blocks before performing BIP check calculations. By预先 identifying control blocks and marking them for exclusion, the system prepares the data structure in advance to avoid incorrect error detection. This preliminary action ensures that subsequent BIP calculations are performed only on appropriate data blocks, maintaining both accuracy and reasonable complexity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If BIP check is performed on all blocks including control blocks, then the calculation is straightforward, but it causes inconsistency between sending and receiving device results due to block addition or deletion

Engineering Contradiction:
Improveerror detection consistencyVSAvoidblock type identification difficulty
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent uses different identification markers (analogous to color coding) for different block types. Control blocks have specific identifier patterns that distinguish them from data blocks. This identification mechanism allows the receiving device to easily recognize and exclude control blocks from BIP check calculations, ensuring consistency with the sending device and resolving the reliability issue.

Inventive Principle:
Principle #32Color changes

3Adaptability or versatility

If block addition or deletion is performed for flexible Ethernet services, then the system becomes adaptable to different service requirements, but it causes inconsistency in BIP check results between sending and receiving devices

Engineering Contradiction:
Improveservice flexibilityVSAvoidbit error rate calculation accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent extracts control blocks from the BIP check calculation process entirely. By removing control blocks from the set of blocks subjected to BIP checking, the system allows flexible addition and deletion of control blocks for service adaptation without affecting BIP result consistency. Only data blocks remain in the calculation, ensuring accurate bit error rate measurement regardless of control block modifications.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11290131B2Bit error detection method and apparatus
Publication Date: 2022.03.29 HUAWEI TECH CO LTD
  • US11290131B2 patent drawing
  • US11290131B2 patent drawing
  • US11290131B2 patent drawing

AI summary

A method includes: receiving a first result obtained by performing BIP check on a sent first to-be-checked bit stream; performing BIP check on a received second to-be-checked bit stream to obtain a second result, where the second to-be-checked bit stream is a bit stream received by a receiving device after the first to-be-checked bit stream is transmitted; detecting a type of a control block in the second to-be-checked bit stream, and determining a third result based on impact of the type of the control block on a BIP check result; comparing the first result, the second result, and the third result; and if the first result is different from the second result, the first result is different from the third result, and the second result is different from a predetermined result, determining that a bit error occurs when the first to-be-checked bit stream is transmitted.