Bi-phase Signal Decoding via Dual FIR Filter Dot Products
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Solution Overview
Problem
Bi-phase modulated signals face challenges in decoding due to low signal amplitudes caused by filtering and transmission medium losses, leading to noise interference and the absence of an external clock for phase alignment, especially when low-pass filtered.
Innovation Solution
A decoder system utilizing finite impulse response filters associated with logic-low and logic-high states, generating dot products from digital samples with tap weights programmed to distinguish between logic states, and a comparator to determine the output code based on absolute value comparisons, effectively decoding bi-phase modulated signals even at low amplitudes and accounting for frequency variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the amplitude of the bi-phase modulated signal is sufficient, then any of a variety of different decoding algorithms can be implemented, but as the amplitude decreases due to filtering and transmission medium losses, decoding becomes difficult due to noise being more likely to appear as valid logic transitions
Solution Approach 1:
The patent changes the parameters of the filtering process by using separate FIR filters with different tap weights optimized for detecting logic-low and logic-high states. This allows the system to maintain decoding accuracy even when signal amplitude is reduced by transmission losses, as each filter is tuned to enhance its respective logic state detection while suppressing noise.
Solution Approach 2:
The decoding process is segmented into two parallel filtering paths: one dedicated to logic-low detection and another to logic-high detection. Each path has its own optimized FIR filter, allowing independent optimization of detection parameters for each logic state, thereby improving overall decoding reliability in low-amplitude conditions.
2Reliability
If a bi-phase modulated signal is low-pass filtered to remove carrier frequency, then the signal can be decoded, but the amplitude of logic-high codes is attenuated more than logic-low codes that are half the frequency
Solution Approach 1:
The patent compensates for the differential attenuation by using FIR filters with specifically designed tap weights that account for the frequency-dependent amplitude loss. The logic-high filter uses tap weights optimized for the higher frequency component, while the logic-low filter uses tap weights optimized for the lower frequency component, thereby equalizing the detection sensitivity for both logic states after low-pass filtering.
3Adaptability or versatility
If there is no external clock to align the phase and frequency of the bi-phase modulated signal, then the system is more self-sufficient, but decoding becomes further complicated
Solution Approach 1:
The patent implements a self-synchronizing decoding system where the FIR filters automatically adapt to the phase and frequency characteristics of the incoming signal through their convolution operation. The filters inherently track the signal parameters without requiring external clock synchronization, as the tap weight structure allows the system to self-adjust to the signal's temporal characteristics.
Data Source
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AI summary
One embodiment of the invention includes a decoder system (10) that decodes a bi-phase modulated signal (BI-F_IN) to generate an output code. The system includes a first filter (12) associated with a first logic state configured to generate a first dot product of a plurality of consecutive digital samples of the bi-phase modulated signal and a respective plurality of tap weights of the first filter. The system also includes a second filter (14) associated with a second logic state configured to generate a second dot product of the plurality of consecutive digital samples of the bi-phase modulated signal with a respective plurality of tap weights of the second filter. The system further includes a comparator (16) configured to compare the first and second dot products and to provide the output code as a bit having one of the first logic state and the second logic state based on the comparison.