Biphase Mark Coding Transmitter Using RC Edge Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional biphase mark coding (BMC) transmitters face issues of mutual influence between digital and analog power systems, leading to noise and high chip area and power consumption due to digital buffers driven by equal-interval data or clocks.
Innovation Solution
A BMC transmitter design incorporating a delay control unit, current-steering digital-to-analog converter, resistance-capacitance circuit, and unity-gain buffer, which performs equal-interval delay processing and controls conversion time to generate output waveforms, isolating power sources and reducing noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If digital buffers are driven by equal-interval data or clocks to control rising/falling edges, then the output waveform can be generated with controlled edges, but large noise of power switch and large chip area and power consumption occur
Solution Approach 1:
The patent replaces the mechanical switching action of digital buffers with an electrical charging/discharging process of a capacitor. The rising edge is generated by charging the capacitor through a current source, and the falling edge is generated by discharging through a current sink, eliminating the need for noisy digital buffer switching while maintaining precise edge control.
Solution Approach 2:
The patent changes the control parameter from digital buffer switching timing to capacitor charging/discharging current control. By regulating the current magnitude and duration, the rising and falling edges are precisely controlled without the noise associated with digital switching, thus improving signal quality while maintaining edge precision.
2Manufacturing precision
If digital buffers are driven by equal-interval data or clocks to control rising/falling edges, then the output waveform can be generated with controlled edges, but large chip area and power consumption occur
Solution Approach 1:
The patent replaces the mechanical switching action of digital buffers with an electrical charging/discharging process of a capacitor. The rising edge is generated by charging the capacitor through a current source, and the falling edge is generated by discharging through a current sink, eliminating the need for noisy digital buffer switching while maintaining precise edge control.
Solution Approach 2:
The patent extracts the essential function of edge generation from the complex digital buffer system and implements it through a simplified capacitor charging/discharging circuit. This extraction removes the unnecessary digital buffering infrastructure, significantly reducing chip area and power consumption while preserving the critical edge control functionality.
3Device complexity
If power sources for digital module and analog module are shared, then device complexity is reduced, but mutual influence between power source systems occurs
Solution Approach 1:
The patent introduces a dedicated current source and current sink as intermediary elements between the power source and the capacitor. These intermediaries provide isolated current paths for digital and analog sections, allowing shared power sources while preventing mutual noise interference through current-mode isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively isolates power sources, reducing noise and chip area/power consumption by using a BMC transmitter with a delay control unit, current-steering digital-to-analog converter, and unity-gain buffer to generate accurately controlled output waveforms.
Implementation Method 1
a current-steering digital-to-analog converter, An input end of the current-steering digital-to-analog converter is connected to an output end of the delay control unit
Implementation Method 2
a resistance-capacitance circuit and a unity-gain buffer. An input end of the resistance-capacitance circuit is connected to an output end of the current-steering digital-to-analog converter
Data Source
AI summary
A biphase mark coding transmitter is provided. In the biphase mark coding transmitter, a delay control unit performs equal-interval delay processing on data transmitted by a data coding and protocol processing unit. Then, the current-steering digital-to-analog converter is controlled to charge or discharge a resistance-capacitance circuit to obtain an accurately-controlled conversion time. Data with the controlled conversion time is driven to a CC by a unity-gain buffer to generate an output waveform. The technical solution solves the technical problem of a mutual influence between power source systems of a traditional BMC transmitter which is a digital module and a traditional BMC receiver which is an analog module, and the technical problem of a large noise of a power switch and large consumption of chip area and power which are resulted from digital buffers driven by equal-interval data or clocks in a traditional BMC transmitter.


