Biphase Mark Signal Receiver Coarse Fine Clock Recovery
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Solution Overview
Problem
Conventional clock recovery circuits for biphase mark encoded data streams face challenges in accurately recovering clock signals and data due to the complexity of biphase encoding, which involves multiple preamble types and unit intervals, leading to difficulties in synchronizing the clock with the data stream.
Innovation Solution
A data recovery circuit with both coarse and fine recovery stages is implemented, utilizing a preamble detector and unit interval measurement circuits to identify and measure specific preamble patterns and unit intervals, generating a sequence of pulses to accurately recover the biphase encoded data stream and clock, with an edge detector and stream recovery circuit to decode the pulses into a synchronized binary data stream.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional PLL-based clock recovery circuit is used, then the circuit can generate a recovered clock signal, but the synchronization accuracy with the biphase mark encoded data stream deteriorates due to the complexity of multiple preamble types and unit intervals
Solution Approach 1:
The clock recovery circuit is divided into two distinct stages: a coarse recovery stage that identifies repeating preambles and establishes initial timing, and a fine recovery stage that precisely measures unit intervals (1UI, 2UI, 3UI) to generate accurate timing decision points. This segmentation allows each stage to focus on specific tasks, improving overall synchronization accuracy while managing complexity through functional decomposition
Solution Approach 2:
The coarse recovery stage performs preliminary identification of repeating preambles (such as Y-preamble patterns) before the fine recovery stage conducts precise unit interval measurements. This preliminary action establishes a foundation for accurate timing recovery by first locating reference points in the data stream, then refining timing based on measured intervals between these points
2Adaptability or versatility
If multiple preamble types (X, Y, Z) and unit intervals (1UI, 2UI, 3UI) are used in biphase mark encoding, then the encoding capability is enhanced, but the difficulty of detecting and measuring timing patterns increases
Solution Approach 1:
The circuit applies different detection strategies to different parts of the encoded stream: the coarse recovery stage specifically targets repeating Y-preamble patterns (1UI between non-1UI patterns) as reference points, while the fine recovery stage measures various unit interval types (1UI, 2UI, 3UI) between these reference points. This localized approach to detection simplifies the overall task by breaking down the complex pattern recognition into manageable segments
Solution Approach 2:
The repeating Y-preamble patterns serve as intermediary reference points that facilitate the measurement process. By identifying these specific patterns in the coarse stage and using them as anchors for fine stage measurements, the circuit transforms the difficult task of directly measuring all timing patterns into a two-step process: first locate references, then measure intervals from references
3Adaptability or versatility
If asynchronous timing is used in the recovered data stream, then the circuit can handle variable timing conditions, but the precision of clock recovery deteriorates
Solution Approach 1:
The circuit dynamically adapts to asynchronous timing conditions by measuring actual unit interval durations (1UI, 2UI, 3UI) between repeating preambles in the incoming data stream. Rather than assuming fixed timing, the fine recovery stage adjusts timing decision points based on measured intervals, allowing the system to maintain precision while accommodating variable timing conditions. The measured 128UI duration and derived timing points are continuously updated to reflect actual stream timing
Data Source
AI summary
A biphase mark signal receiver includes a data and clock recovery circuit. The data recovery circuit may include a coarse recovery stage and a fine recovery stage. The coarse recovery stage is configured to detect repeating occurrences of a first preamble (e.g., Y-preamble) within a biphase encoded data stream received by the data recovery circuit. The fine recovery stage is configured to generate a recovered data stream, in response to estimating a plurality of timing decision points (e.g., 3UI, 2UI and 1UI) from the repeating occurrences of the first preamble detected by the coarse recovery stage.