Bipolar MIM Memory Stack for Low-Voltage Switching

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Solution Overview

Problem

Fabricating memory devices from reversible resistivity-switching materials is challenging, and existing methods for forming memory cells with bipolar storage elements require large forming voltages and suffer from reliability issues.

Innovation Solution

A metal-insulator-metal (MIM) stack with a reversible resistivity switching (RRS) material sandwiched between two conductive layers, where the stack exhibits bipolar switching properties due to differences in electrode interfaces, allowing for improved switching reliability and reduced voltage requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional methods are used to fabricate memory devices from reversible resistivity-switching materials, then the fabrication process is difficult and complex, but the patent employs a metal-insulator-metal (MIM) stack structure that simplifies the fabrication process using conventional techniques

Engineering Contradiction:
Improveease of fabricationVSAvoidstructure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent employs a metal-insulator-metal (MIM) stack structure comprising a first conductive layer, an RRS layer, a metal/metal oxide layer stack, and a second conductive layer. This composite structure integrates multiple materials with different properties (conductive metals, insulating RRS materials, and intermediate metal oxide layers) to achieve both simplified fabrication using conventional techniques and the desired bipolar switching functionality, resolving the contradiction between ease of manufacture and device complexity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The memory cell structure is segmented into distinct functional layers: a first conductive layer, an RRS layer, a metal/metal oxide layer stack, and a second conductive layer. Each layer performs a specific function, allowing the complex bipolar switching behavior to be achieved through the coordinated interaction of simpler, individually fabricatable components using conventional techniques

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If existing methods form memory cells with bipolar storage elements, then large forming voltages are required, but the patent's MIM stack structure reduces the voltage requirements

Engineering Contradiction:
Improvevoltage requirementVSAvoidswitching reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent introduces a metal/metal oxide layer stack positioned between the RRS layer and the second conductive layer. This localized structural modification creates different electrical properties at different interfaces within the MIM stack. The metal oxide layer specifically engineered at this position enables reduced forming voltages while maintaining reliable bipolar switching, as it facilitates controlled ion migration and filament formation at the critical interface region

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent modifies the electrical parameters of the memory cell by introducing the metal/metal oxide layer stack, which changes the interfacial properties between the RRS layer and the second conductive layer. This parameter change enables lower forming voltages while maintaining switching reliability, as the metal oxide layer facilitates controlled electrochemical reactions and reduces the energy barrier for filament formation and rupture

Inventive Principle:
Principle #35Parameter changes

3Reliability

If existing methods are used to fabricate memory devices, then reliability issues occur, but the patent's bipolar MIM stacks demonstrate enhanced switching properties and improved reliability

Engineering Contradiction:
Improveswitching reliabilityVSAvoidMIM stack structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs a metal-insulator-metal (MIM) stack structure comprising a first conductive layer, an RRS layer, a metal/metal oxide layer stack, and a second conductive layer. This composite structure integrates multiple materials with different properties (conductive metals, insulating RRS materials, and intermediate metal oxide layers) to achieve both simplified fabrication using conventional techniques and the desired bipolar switching functionality, resolving the contradiction between ease of manufacture and device complexity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The metal/metal oxide layer stack acts as a buffer or cushioning layer between the RRS layer and the second conductive layer. This intermediate layer prevents direct contact between potentially incompatible materials, reduces stress concentration, and provides a controlled environment for electrochemical reactions, thereby enhancing the overall reliability and durability of the bipolar switching element

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The bipolar MIM stacks demonstrate enhanced switching properties and can be fabricated using conventional techniques, offering improved reliability and reduced voltage needs for memory cell operations.

Implementation Method 1

a reversible resistivity switching (RRS) layer formed above the first conductive layer

Methodology Applied
Scientific EffectResistivity switching: Electrical Resistance

Data Source

PatentUS9105576B2Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same
Publication Date: 2015.08.11 SANDISK TECHNOLOGIES LLC
  • US9105576B2 patent drawing
  • US9105576B2 patent drawing
  • US9105576B2 patent drawing

AI summary

In some embodiments, a memory array is provided that includes (1) a first memory cell having (a) a first conductive line; (b) a first bipolar storage element formed above the first conductive line; and (c) a second conductive line formed above the first bipolar storage element; and (2) a second memory cell formed above the first memory cell and having (a) a second bipolar storage element formed above the second conductive line; and (b) a third conductive line formed above the second bipolar storage element. The first and second memory cells share the second conductive line; the first bipolar storage element has a first storage element polarity orientation within the first memory cell; the second bipolar storage element has a second storage element polarity orientation within the second memory cell; and the second storage element polarity orientation is opposite the first storage element polarity orientation. Numerous other aspects are provided.