Bipolar Transistor Poly-Fuse Memory Reducing Silicon Area
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Solution Overview
Problem
Existing non-volatile memory systems face challenges in efficiently using poly-fuse-resistors due to the large size of MOS transistors required to switch high writing currents, leading to costly and bulky memory systems.
Innovation Solution
The use of bipolar junction transistors (BJTs) to selectively control writing currents through poly-fuse-resistors, enabling a compact and cost-effective one-time programmable memory system by switching on and off to alter the resistance state, with a NOR gate providing the transistor-control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If MOS transistors are used to switch writing currents through poly-fuse-resistors, then the memory system can be implemented, but the transistor size becomes large and the system becomes bulky and costly
Solution Approach 1:
The patent changes the switching mechanism from MOS transistors to bipolar junction transistors (BJTs), fundamentally altering the device parameter space. BJTs can handle high writing currents with much smaller device dimensions compared to MOS transistors, directly resolving the contradiction between functionality and area occupation.
Solution Approach 2:
The invention substitutes the MOS transistor switching mechanism with a BJT switching mechanism. This replacement leverages the different operational characteristics of bipolar transistors, which provide superior current switching capability per unit area, thereby reducing the overall silicon footprint while maintaining memory system functionality.
2Productivity
If MOS transistors are used to switch high writing currents, then the memory operation can be performed, but the operational efficiency decreases and cost increases
Solution Approach 1:
By transitioning from MOS to BJT technology, the patent changes the operational parameters of the switching device. BJTs offer faster switching speeds and better current handling capabilities, which improve operational efficiency and can reduce manufacturing costs by requiring fewer devices to achieve the same functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for a compact and low-cost implementation of poly-fuse-resistor-based OTP memory systems, reducing silicon area and operational efficiency compared to MOS transistor-based solutions.
Implementation Method 1
The writing-current may be large enough to change the state of the poly-fuse-resistor from an initial-resistance-state to an altered-resistance-state
Data Source
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AI summary
A memory system comprising: a memory cell. The memory cell comprising a poly-fuse-resistor; and a bipolar junction transistor having a collector-emitter channel and a base-terminal. The collector-emitter channel of the bipolar junction transistor is connected in series with the poly-fuse resistor between a supply-voltage-terminal and a ground-terminal. The base-terminal of the bipolar junction transistor is configured to receive a transistor-control-signal to selectively control a current flow through the poly-fuse-resistor.