Bipolar Transistor Cavity Epitaxy for Lower Base Resistance

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Solution Overview

Problem

Bipolar transistors have limitations in achieving high maximum oscillation frequency due to high extrinsic base resistance, which is a result of existing semiconductor region manufacturing methods.

Innovation Solution

A method for manufacturing a bipolar transistor involving the formation of a stack of layers, including an insulating layer and a base region layer, with epitaxial growth of collector and base regions, and precise etching to reduce extrinsic base resistance, allowing for a smaller emitter region and improved frequency performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor region manufacturing methods are used, then the manufacturing process is simpler, but the extrinsic base resistance is high which limits maximum oscillation frequency

Engineering Contradiction:
Improvemaximum oscillation frequencyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into multiple sequential steps: forming a stack of layers with different materials, creating a cavity through the stack, selectively depositing materials in the cavity, and performing precise etching operations. This segmentation allows each step to be optimized independently to reduce extrinsic base resistance while maintaining manufacturing feasibility

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different materials are used in different regions of the device structure. The stack of layers includes materials with different properties (e.g., silicon, silicon oxide, silicon nitride) positioned strategically to achieve low resistance in the base region while maintaining appropriate properties in other regions. This local optimization of material properties enables reduced extrinsic base resistance without compromising overall device performance

Inventive Principle:
Principle #3Local quality

2Reliability

If the emitter region size is reduced to improve frequency performance, then the maximum oscillation frequency increases, but the manufacturing precision requirements increase

Engineering Contradiction:
Improvemaximum oscillation frequencyVSAvoidemitter region dimension precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A cavity structure is introduced as an intermediary element during manufacturing. This cavity allows for precise positioning and sizing of the emitter region through controlled deposition and etching processes. The cavity acts as a template that guides the formation of the emitter region, enabling accurate dimensional control even for small emitter sizes

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The stack of layers is formed beforehand with precise thicknesses and material compositions before the emitter region is created. This preliminary structuring establishes a controlled environment that facilitates subsequent precise emitter formation, allowing small emitter dimensions to be achieved with appropriate manufacturing precision

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method results in a lower extrinsic base resistance, thereby increasing the maximum oscillation frequency of the bipolar transistor beyond that of conventional devices.

Implementation Method 1

the second portion of the collector region and the first portion of the base region are formed by epitaxial growth in the cavity

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20240162328A1Transistor manufacturing method
Publication Date: 2024.05.16 STMICROELECTRONICS (CROLLES 2) SAS
  • US20240162328A1 patent drawing
  • US20240162328A1 patent drawing
  • US20240162328A1 patent drawing

AI summary

A bipolar transistor is manufactured by: forming a collector region; forming a first layer made of a material of a base region and an insulating second layer; forming a cavity reaching the collector region; forming a portion of the collector region and a portion of the base region in the cavity; forming an insulating fourth layer made of a same material as the insulating second layer in the periphery of the bottom of the cavity, the insulating fourth layer having a same thickness as the insulating second layer; forming an emitter region; and simultaneously removing the insulating second and a portion of the insulating fourth layer not covered by the emitter region.