Bipolar Transistor With Contoured Emitter Base Junction
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Solution Overview
Problem
Bipolar transistors in integrated circuits (ICs) often have less than ideal performance when manufactured using processes optimized for other device types, leading to suboptimal properties such as low current gain, due to doping densities and depths being optimized for CMOS logic devices rather than bipolar transistors, which can increase manufacturing costs by requiring additional processing steps.
Innovation Solution
A bipolar transistor structure is formed using selected CMOS process steps without adding new steps, featuring a collector region with a buried layer, a base region with varying base widths, and an emitter region with specific doping profiles, allowing for improved properties like increased current gain without modifying the existing IC manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bipolar transistors are manufactured using processes optimized for CMOS devices, then manufacturing cost is reduced, but transistor performance deteriorates
Solution Approach 1:
The patent applies parameter changes by modifying doping densities and depth parameters within the existing CMOS process framework. Specifically, the bipolar transistor structure utilizes adjusted doping concentrations in the collector, base, and emitter regions, along with optimized junction depths, to achieve improved current gain and breakdown voltage without requiring process modifications. This resolves the contradiction by tuning physical parameters rather than changing the manufacturing process itself.
Solution Approach 2:
The patent implements dynamics through the contoured emitter-base junction design featuring a transition region with varying depth. The emitter structure includes a first portion extending to a first depth and a second portion extending to a second depth, creating a dynamic profile that optimizes carrier injection and collection. This dynamic structural design enables high performance bipolar transistor operation within the constraints of standard CMOS processing.
2Reliability
If additional processing steps are added to improve bipolar transistor properties, then transistor performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent applies universality by designing a bipolar transistor structure that can be fabricated using the same process steps as standard CMOS devices. The contoured emitter-base junction and multi-region doping profile are achieved through process steps that serve dual purposes: forming both the bipolar transistor structure and compatible CMOS device features. This eliminates the need for additional dedicated processing steps while maintaining improved bipolar transistor properties.
Solution Approach 2:
The patent merges the formation of the contoured emitter-base junction with standard CMOS process steps. The doping profiles and junction depths are integrated into the existing process sequence, combining bipolar device fabrication requirements with CMOS process capabilities. This merging approach achieves improved transistor properties without adding separate processing steps, thereby avoiding increased manufacturing cost.
Data Source
AI summary
Embodiments for forming improved bipolar transistors are provided, manufacturable by a CMOS IC process. The improved transistor comprises an emitter having first and second portions of different depths, a base underlying the emitter having a central portion of a first base width underlying the first portion of the emitter, a peripheral portion having a second base width larger than the first base width partly underlying the second portion of the emitter, and a transition zone of a third base width and lateral extent lying laterally between the first and second portions of the base, and a collector underlying the base. The gain of the transistor is larger than a conventional bipolar transistor made using the same CMOS process. By adjusting the lateral extent of the transition zone, the properties of the improved transistor can be tailored to suit different applications without modifying the underlying CMOS IC process.