Bipolar Transistor Emitter Doping for Gain Optimization
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Solution Overview
Problem
Bipolar transistors and diodes in integrated circuits are not optimized due to shared ion implantation and diffusion processes with MOS transistors, resulting in suboptimal performance parameters, such as low gains for parasitic vertical bipolar pnp transistors.
Innovation Solution
A method where the emitter region of bipolar transistors is implanted with a first dopant during MOS transistor source/drain region implantation and a second dopant during resistor body region implantation, allowing for independent optimization of both without dedicated processes, with the order of these implantations being interchangeable.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If photolithographic, ion implantation and diffusion processes are shared between MOS transistors and bipolar transistors, then manufacturing cost is reduced, but bipolar transistor performance parameters deteriorate
Solution Approach 1:
The patent applies local quality by implementing component-specific process parameters within shared manufacturing steps. Different dopant species, doses, and energy levels are used for MOS transistor source/drain regions versus bipolar transistor emitter regions, even though both are formed during the same implantation cycle. This allows each component type to receive optimized doping conditions tailored to its specific performance requirements while maintaining process integration.
Solution Approach 2:
The patent employs parameter changes by varying implantation conditions (dopant type, concentration, energy, angle) between different implantation steps that form different components. The first dopant species and parameters are optimized for MOS source/drain regions, while the second dopant species and parameters are optimized for bipolar emitter regions, enabling performance optimization for both component types within shared processes.
2Manufacturing precision
If process parameters are chosen to maximize MOS transistor parameters, then MOS transistor performance is improved, but bipolar transistor gain deteriorates
Solution Approach 1:
The patent applies segmentation by dividing the dopant introduction process into distinct implantation steps: a first implantation step for MOS transistor source/drain regions using first dopant species, and a second implantation step for bipolar transistor emitter regions using second dopant species. This segmentation allows independent optimization of process parameters for each component type, preventing the degradation of bipolar transistor gain that would result from optimizing solely for MOS transistor performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the gain of bipolar transistors by forming the emitter-base junction closer to the base-collector junction, improving transistor performance without adversely affecting the resistors, and can be applied to various types of bipolar transistors like vertical, buried collector, and lateral npn/pnp transistors.
Implementation Method 1
an emitter region is implanted with a first dopant of given conductivity type in an implantation process that implants source/drain regions of an MOS transistor, and is also implanted with a second dopant of the same given conductivity type in another implantation process that implants a body region of a resistor
Implementation Method 2
Doped regions in and on the semiconductor substrate that are parts of the transistors, diodes and resistors are typically formed by ion implantation or diffusion of dopant species into the substrate
Data Source
AI summary
Complementary MOS (CMOS) integrated circuits include MOS transistors, resistors and bipolar transistors formed on a common substrate. An emitter region of a bipolar transistor is implanted with a first dopant in an implantation process that implants source/drain regions of an MOS transistor, and is also implanted with a second dopant of same conductivity type in another implantation process that implants a body region of a resistor. The first and second dopants may optionally be the same dopant. The source/drain regions are implanted with the resistor body region covered by a first patterned mask; and the resistor body region is implanted with the MOS transistor source/drain regions covered by a second patterned mask. The implantations of the MOS transistor source/drain regions and of the resistor body region the source/drain regions can occur in any order, with the emitter region implanted during both implantations.