Bipolar Transistor Structure for Faster Reverse Recovery

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Solution Overview

Problem

The reverse recovery time of bipolar transistors is limited by the time needed to remove holes injected into the collector during a reverse-bias state, which affects the frequency response of the transistor.

Innovation Solution

Incorporating a parasitic PNP transistor that provides a conductive path for hole extraction to the device substrate, reducing reverse recovery time by adding p-type regions that facilitate fast hole extraction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional bipolar transistor structure is used, then device simplicity is maintained, but reverse recovery time is limited and frequency response is restricted

Engineering Contradiction:
Improvefrequency responseVSAvoidreverse recovery time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent merges the bipolar transistor with a parasitic PNP transistor structure, where the PNP transistor's collector is connected to the bipolar transistor's collector and the PNP emitter is connected to the substrate. This combined structure allows the PNP transistor to provide a hole extraction path that reduces the bipolar transistor's reverse recovery time, thereby improving frequency response without adding external components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The parasitic PNP transistor acts as an intermediary structure that facilitates hole extraction from the bipolar transistor's collector during reverse recovery. The PNP transistor provides a conductive path through its base and collector regions to the substrate, serving as a mediator that accelerates the removal of stored holes and reduces reverse recovery time.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If Schottky diodes are added to improve reverse recovery, then frequency response improves, but device complexity increases

Engineering Contradiction:
Improvefrequency responseVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent employs the self-service principle by utilizing the parasitic PNP transistor that inherently exists in the bipolar transistor structure. Instead of adding external components like Schottky diodes, the design leverages the naturally formed PNP transistor and connects its collector to the bipolar collector and emitter to the substrate, allowing the structure to serve its own reverse recovery function without additional components.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The parasitic PNP transistor structure serves multiple functions: it provides the primary transistor action for signal amplification and simultaneously acts as a hole extraction path during reverse recovery. This multi-functionality eliminates the need for separate reverse recovery components, maintaining device simplicity while improving frequency response.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances the reverse recovery performance of bipolar transistors by providing a low impedance path for hole carriers, thereby improving maximum operating frequency without the need for additional components like Schottky diodes.

Implementation Method 1

Incorporating a parasitic PNP transistor that provides a conductive path for hole extraction to the device substrate

Methodology Applied
Scientific EffectHole conduction: Conduction (electrical)

Data Source

PatentUS20250221014A1Bipolar transistor reverse recovery
Publication Date: 2025.07.03 TEXAS INSTRUMENTS INC
  • US20250221014A1 patent drawing
  • US20250221014A1 patent drawing
  • US20250221014A1 patent drawing

AI summary

An electronic device includes an NPN bipolar transistor in an isolation tank region of an n-type semiconductor layer and having a p-type base region, an n-type emitter region, and an n-type collector region and a PNP bipolar transistor in the isolation tank region of the semiconductor layer and having an n-type base formed by a portion of the n-type semiconductor layer, a p-type emitter formed by a portion of the p-type base region of the NPN bipolar transistor, and a p-type collector formed by a p-type second collector region in the isolation tank region of the semiconductor layer and spaced apart from the p-type base region and from the n-type collector region of the NPN bipolar transistor.