BIST Controller Reduces Memory Toggle IR Drop
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuits with multiple memory modules, the increased boundary logic during scan shift operations leads to higher toggle rates, resulting in IR drops and potentially incorrect results, unless the operation is slowed down, which may require additional hardware or degrade performance.
Innovation Solution
A built-in self-test (BIST) controller is implemented, comprising BIST multiplexers and logic circuits that selectively enable or disable BIST inputs and scan enable inputs to reduce toggling of memory modules during scan shift, thereby minimizing power issues caused by IR voltage drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory modules are used to increase memory capacity, then memory capacity is improved, but boundary logic increases leading to higher toggle rates and IR drop
Solution Approach 1:
The memory system is divided into multiple independent memory modules (MEM0-MEM3), each with its own boundary logic and control signals. This segmentation allows independent control of each module's toggling behavior during scan operations, enabling the BIST controller to selectively enable/disable specific modules to reduce overall toggle rate and IR drop.
Solution Approach 2:
The BIST controller pre-configures the memory modules by enabling or disabling them before scan operations based on detected IR drop conditions. By anticipating and preparing the memory module states in advance, the system can prevent excessive toggling and IR drop during scan shifts without degrading test performance.
2Object-generated harmful factors
If scan shift operation is slowed down to reduce IR drop, then power issues are reduced, but test time increases
Solution Approach 1:
The BIST controller detects IR drop conditions and pre-enables or disables specific memory modules before scan operations begin. This preliminary configuration allows the system to maintain optimal scan speeds while preventing IR drop by selectively controlling which modules are active, avoiding the need to slow down the entire scan operation.
Solution Approach 2:
Instead of disabling all memory modules or slowing down the entire scan operation, the BIST controller applies partial action by selectively enabling only the necessary number of memory modules based on IR drop detection. This approach maintains sufficient test coverage and scan speed while reducing toggle rate and IR drop to acceptable levels.
3Object-generated harmful factors
If additional hardware is added to reduce IR drop during scan shift, then power issues are reduced, but device complexity increases
Solution Approach 1:
The BIST controller is designed to perform multiple functions: normal built-in self-test operations, IR drop detection, and dynamic memory module enabling/disabling during scan operations. By making the BIST controller multi-functional, the patent avoids adding separate dedicated hardware for each function, thereby reducing overall device complexity while still achieving IR drop reduction.
Solution Approach 2:
The BIST controller autonomously detects IR drop conditions and automatically adjusts memory module enabling states without requiring external intervention or additional control hardware. This self-service capability reduces the need for external controllers or complex coordination logic, simplifying the overall system architecture.
Data Source
AI summary
The disclosure relates to a system and method for maintaining stability during a scan shift operation on multiple embedded memories in an integrated circuit. Examples disclosed herein include an integrated circuit comprising a plurality of memory modules and a built-in self-test controller, wherein the BIST controller and memory modules are arranged and configured to reduce toggling of cells in the memory modules during a scan shift operation.