BIST Controller Random Memory Accesses for Side Channel Attack Prevention
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Solution Overview
Problem
Computing devices employing cryptographic methods are vulnerable to side-channel attacks, particularly power consumption attacks that analyze fluctuations in power usage to derive secret information, necessitating a mechanism to obscure power consumption profiles.
Innovation Solution
A built-in self-test (BIST) controller generates random power consumption profiles by performing random memory accesses in a processor not executing secure code, using random data patterns and addresses to obscure the power consumption of the processor executing cryptographic functions, thereby preventing attackers from analyzing power consumption patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic methods are implemented in computing devices, then security of operation is improved, but vulnerability to side-channel attacks increases
Solution Approach 1:
The patent introduces a mediator component (the BIST controller with random access logic) that inserts itself between the cryptographic processor and the external environment. This mediator generates random memory accesses that act as a shield, masking the actual power consumption patterns of the cryptographic operations from external observers, thereby preventing side-channel attacks while maintaining security functionality
Solution Approach 2:
The patent changes the parameter of power consumption pattern from deterministic to random by introducing random memory accesses. The BIST controller modifies the temporal and spatial parameters of memory access patterns, creating variable power consumption profiles that do not correlate with the cryptographic operations being performed, thus eliminating the information leakage channel
2Measurement precision
If power consumption monitoring is performed to detect attacks, then detection capability is improved, but power consumption patterns become predictable
Solution Approach 1:
Instead of monitoring power consumption to detect attacks, the patent inverts the approach by actively generating random power consumption patterns through BIST memory accesses. This inversion transforms the power consumption profile from a passive indicator of cryptographic operations into an active mask that obscures those operations, making pattern analysis ineffective
3Object-affected harmful factors
If random memory accesses are performed by BIST logic, then power consumption obscuring is improved, but device complexity increases
Solution Approach 1:
The patent applies multi-functionality by designing the BIST controller to serve dual purposes: traditional built-in self-test functionality for memory testing and verification, plus the new function of generating random power consumption masks for security. This universal design avoids adding separate dedicated hardware solely for power obscuring, thereby limiting the increase in device complexity
Data Source
AI summary
A data processing system having a first processor, a second processor, a local memory of the second processor, and a built-in self-test (BIST) controller of the second processor which performs BIST memory accesses on the local memory of the second processor and which includes a random value generator is provided. The system can perform a method including executing a secure code sequence by the first processor and performing, by the BIST controller of the second processor, BIST memory accesses to the local memory of the second processor in response to the random value generator. Performing the BIST memory accesses is performed concurrently with executing the secure code sequence.