Built-in Self-Test Circuits for MOSFET Fail-Short Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power conversion systems fail to detect fail-short conditions in MOSFETs effectively, leading to increased costs, decreased power efficiency, and reduced functionality due to the need for additional components and assumptions about common root causes.
Innovation Solution
Incorporating built-in self-test (BIST) circuits that regulate the drain-to-source voltage of MOSFETs to detect zero crossings in gate-to-source voltage, allowing for early detection of fail-short failures and reducing power loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional components and assumptions about common root causes are used to detect fail-short conditions, then detection capability is improved, but device complexity and cost increase
Solution Approach 1:
The MOSFET's inherent capacitances (Cgs, Cgd, Cds) are utilized as the detection mechanism, eliminating the need for external test components. The device's own electrical characteristics serve the dual purpose of normal operation and fault detection, reducing overall system complexity while maintaining reliability.
Solution Approach 2:
The patent replaces complex mechanical test equipment and external monitoring circuits with an electronic field-based detection method. By monitoring voltage transitions and capacitance changes during switching operations, the system achieves fault detection through electrical measurements rather than physical testing apparatus.
2Reliability
If additional components are added to detect fail-short conditions, then detection capability is improved, but power efficiency decreases
Solution Approach 1:
The detection circuit utilizes the MOSFET's own capacitances and switching characteristics to generate detectable voltage transitions. No external power-intensive test equipment is required, as the device's normal operating parameters serve as the detection mechanism, minimizing additional power consumption.
Solution Approach 2:
The detection method operates periodically during the MOSFET's natural switching cycles. By monitoring voltage transitions at specific points in the switching waveform, the system achieves continuous fault detection without requiring separate continuous monitoring power sources.
3Reliability
If additional components are added to detect fail-short conditions, then detection capability is improved, but functionality is reduced
Solution Approach 1:
The monitoring circuit is designed to serve multiple functions: it detects fail-short conditions, verifies proper MOSFET operation, and can interface with various control systems. The same circuitry that monitors for faults also provides information about the device's operational state, increasing overall system versatility.
Solution Approach 2:
The MOSFET continues to perform its primary power switching function while simultaneously providing the electrical characteristics needed for fault detection. No separate test device is required, allowing the system to maintain full functionality without compromising adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The BIST circuits enable efficient detection of fail-short failures in MOSFETs, reducing power loss and improving system reliability while maintaining power efficiency and functionality.
Implementation Method 1
Incorporating built-in self-test (BIST) circuits that regulate the drain-to-source voltage of MOSFETs to detect zero crossings in gate-to-source voltage
Implementation Method 2
regulate the drain-to-source voltage of MOSFETs to detect zero crossings in gate-to-source voltage
Data Source
AI summary
Built-in self-test (BIST) circuits and related methods are disclosed. An example BIST circuit includes a state machine to generate a control signal to reduce a gate voltage associated with a transistor from a first voltage to a second voltage when an enable signal is asserted, the transistor to be enabled at the first voltage and the second voltage, and assert an alert signal when a gate-to-source voltage associated with the transistor satisfies a threshold when the gate voltage is reduced to the second voltage.


