BIST Circuit for Multi-Mode Power Supply Verification

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Solution Overview

Problem

Testing the status of power supplies in multiple power modes within Systems on a Chip (SoCs) is complex and often not verified until late in the design flow, leading to potential issues being discovered too late, and there is a need for a method to check power supply status during IC design, manufacturing, and operation.

Innovation Solution

A Built-In Self Test (BIST) circuit comprising a finite state machine, power monitors, and a comparator that sequentially enables power mode states and compares voltage monitor signals with reference signals to generate status signals indicating correct operation of power supplies and their connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power supply connections are confirmed using CPF in the back-end team, then power supply connections are verified, but the verification occurs too late in the design flow and does not cover all power modes

Engineering Contradiction:
Improvepower supply connection verificationVSAvoiddesign flow timing
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements power supply verification through CPF checks and BIST circuits during early design simulation phases rather than waiting for back-end verification. This preliminary action allows power supply issues to be detected and resolved earlier in the design flow, preventing delays during manufacturing and field operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The BIST circuit enables the system to automatically verify its own power supply status without external testing equipment. The circuit monitors voltage levels, detects brownout conditions, and generates status signals autonomously, allowing continuous self-verification across all power modes during operation.

Inventive Principle:
Principle #25Self-service

2Reliability

If a BIST circuit is implemented to test power supplies in all power modes, then comprehensive power supply verification is achieved, but the circuit complexity increases

Engineering Contradiction:
Improvepower supply status verificationVSAvoidBIST circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The BIST circuit is designed to universally test all power supplies across all power modes using a single integrated structure. The circuit includes multiplexers that can select between different power supply voltages (VDD, VDDA, VDDCORE, VDDIO) and a unified comparison mechanism that works across sleep, deep sleep, and functional modes, eliminating the need for separate testing circuits for each power mode.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The BIST circuit employs a nested structure where voltage comparison logic is embedded within a state machine framework, which in turn is integrated into the overall power management system. The comparison results are nested within status signals that can be further processed by existing system monitoring infrastructure, allowing comprehensive testing without proportionally increasing overall system complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Measurement precision

If voltage comparison is performed for each power supply in each power mode, then accurate power supply status is detected, but the testing process becomes time-consuming

Engineering Contradiction:
Improvevoltage status detectionVSAvoidtesting duration
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The BIST circuit performs voltage comparisons periodically across different power modes using a state machine that cycles through each power mode state. Rather than continuously testing all power supplies simultaneously, the circuit sequentially activates each power mode and performs targeted voltage comparisons, achieving comprehensive coverage while minimizing total testing time through efficient periodic sampling.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9429630B2Circuit for testing power supplies in multiple power modes
Publication Date: 2016.08.30 NXP USA INC
  • US9429630B2 patent drawing
  • US9429630B2 patent drawing
  • US9429630B2 patent drawing

AI summary

A BIST circuit is provided for testing the status of power supplies in an integrated circuit in multiple power modes including multiple circuit blocks. The BIST circuit includes a finite state machine (FSM), power monitors and a comparator. The FSM sequentially enables at least two power mode states in a predetermined order. In each power mode state, the FSM outputs power mode signals to enable the power supplies used in the corresponding power mode. Each power monitor is connected to a power input node of one of the circuit blocks, and outputs a monitor signal indicative of the voltage at the corresponding power input node when the corresponding power supply is enabled. The comparator compares each monitor signal with a corresponding reference signal and generates a set of power supply status signals.