Bistable Ring PUF With Multiplexer Routing
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Solution Overview
Problem
Existing PUFs, such as arbiter and bistable ring PUFs, exhibit linear behavior and insufficient nonlinear characteristics, making them vulnerable to mechanical learning attacks and lacking in uniform response distribution, which compromises their effectiveness in authentication and key generation.
Innovation Solution
A PUF comprising a bistable ring of inverter stages with multiplexers interspersed between them, allowing the course of the bistable ring to change based on challenge bits, enhancing nonlinear behavior and response uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional arbiter PUF or bistable ring PUF architectures are used, then the device structure is simple and easy to manufacture, but the nonlinear behavior is insufficient making them vulnerable to mechanical learning attacks
Solution Approach 1:
The patent introduces dynamic elements (multiplexers) that allow the PUF structure to change its configuration based on challenge inputs. The multiplexers dynamically select between different delay path configurations, creating a dynamic rather than static evaluation path. This dynamic reconfiguration based on challenge bits significantly increases nonlinear behavior and resistance to mechanical learning attacks, while maintaining a relatively simple underlying delay element structure.
Solution Approach 2:
The patent introduces multiplexers as intermediary components between the challenge input and the delay elements. These multiplexers act as mediators that route signals through different combinations of delay elements based on challenge bits. This intermediary layer adds computational complexity and nonlinear behavior without requiring fundamental changes to the basic delay element architecture, thus improving security while controlling overall device complexity.
2Reliability
If simple PUF architectures are used, then the manufacturing process is easy, but the response distribution is non-uniform reducing effectiveness
Solution Approach 1:
The dynamic configuration of delay paths through multiplexers allows the PUF to adapt its structure to achieve more uniform response distribution. By dynamically selecting different combinations of delay elements based on challenge inputs, the system can balance the probability of different response outcomes, improving uniformity without requiring complex manufacturing processes for each individual delay element.
Solution Approach 2:
The patent changes the operational parameters of the PUF by introducing control signals (challenge bits) that modify the effective delay path configuration. This parameter change approach allows the same physical structure to produce different response distributions dynamically, achieving uniformity through operational flexibility rather than manufacturing complexity.
3Reliability
If linear PUF behavior is used, then the evaluation is simple, but the authentication security is compromised
Solution Approach 1:
The multiplexers serve as intermediary components that introduce nonlinear behavior between the simple delay elements and the final output. This intermediary layer transforms the linear behavior of individual delay elements into complex nonlinear system behavior through dynamic routing decisions, achieving high authentication security while keeping the basic building blocks simple and evaluable.
Solution Approach 2:
The patent segments the PUF into multiple independent delay elements controlled by separate challenge bits. Each delay element can be independently evaluated and understood, maintaining simplicity at the component level. The overall system achieves high behavioral complexity through the combinatorial interactions of these segmented elements, allowing simple components to create complex secure behavior.
Data Source
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Figure 3A~3C
AI summary
A PUF is provided. The PUF comprises a bistable ring of a plurality of inverter stages, wherein the bistable ring comprises multiplexers interspersed between the inverter stages. The PUF is configured to change, in dependence on challenge bits applied to the multiplexers, a course of the bistable ring along which the inverter stages are serially connected via the multiplexers.