Bit Block Stream Parity Checking for M/N Switching Error Detection
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Solution Overview
Problem
Current bit error detection methods in M/N bit block switching scenarios face challenges of high implementation difficulty and low bearer efficiency, particularly in accurately measuring bit error rates and tolerating bit blocks inserted or deleted due to synchronization issues, with existing methods like CRC and BIP requiring significant fixed frame bytes and inflexible check algorithms.
Innovation Solution
A bit block stream bit error detection method that involves sending boundary bit blocks with parity check results, allowing dynamic configuration of detection period and precision, and using algorithms like xBIP-y or flexBIP-z to tolerate inserted or deleted bit blocks, ensuring 100% bearer efficiency and flexible implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If CRC or BIP check methods are used for bit error detection, then bit error detection capability is improved, but bearer efficiency decreases due to occupation of fixed frame bytes
Solution Approach 1:
The patent applies dynamics by making the check algorithm configurable and adaptable rather than fixed. The system can dynamically select between different check algorithms (CRC, BIP, or no check) and adjust check intensity based on actual network conditions and service requirements, thereby optimizing bearer efficiency while maintaining necessary error detection capability
Solution Approach 2:
The patent changes parameters by allowing flexible configuration of check algorithm types, check intervals, and check ranges. Instead of occupying fixed frame bytes with check data, the system adjusts these parameters dynamically to balance error detection reliability with bearer efficiency, reducing overhead when high reliability is not required
2Reliability
If packet-based CRC detection is used, then error detection is improved, but detection time increases significantly when user service bandwidth is low
Solution Approach 1:
The patent applies dynamics by enabling adaptive adjustment of detection parameters based on network conditions. When user service bandwidth is low, the system can dynamically reduce detection intensity or increase detection intervals, preventing excessive detection time while maintaining adequate error detection capability for the actual traffic load
Solution Approach 2:
The patent applies partial action by allowing selective error detection based on service requirements. Instead of performing full CRC checks on all packets regardless of conditions, the system performs partial detection or uses lighter check algorithms when full detection is not necessary, reducing detection time while maintaining sufficient reliability for the given service level
3Reliability
If BIP check with fixed frame structure is used, then bit error detection is improved, but adaptability decreases as check algorithm cannot be dynamically configured
Solution Approach 1:
The patent applies dynamics by transforming the static BIP check algorithm into a dynamic, configurable system. The check algorithm type, check interval, and check range can all be adjusted in real-time based on network conditions and service requirements, enabling the system to adapt between different error detection strategies rather than being locked into a fixed algorithm
Solution Approach 2:
The patent applies universality by designing a unified error detection framework that can accommodate multiple check algorithms (CRC, BIP, or no check) and multiple configuration modes. This universal framework replaces the single-function fixed BIP check with a multi-functional system that can perform different types of error detection depending on requirements, enhancing both adaptability and versatility
Data Source
AI summary
A method includes: sending a first boundary bit block; sequentially sending an Ith bit block; determining a first parity check result and a second parity check result, where a check object of the first parity check result includes m consecutive bits of each bit block in the N bit blocks, a check object of the second parity check result includes n consecutive bits of each bit block in the N bit blocks, and at least one of m and n is greater than or equal to 2; and sending a second boundary bit block, the first parity check result, and the second parity check result.