Bit Block Stream Rate Matching via Slot Segmentation
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Solution Overview
Problem
Current Ethernet technologies face challenges in flexible bandwidth management, as they cannot perform rate adaptation or switching separately on bit block streams transmitted in multiple slots, leading to inefficiencies and mismatches in transmission delays and idle bit block insertion locations.
Innovation Solution
The method involves mapping a bit block stream into multiple slot bit block streams with boundary bit blocks, allowing for separate slot rate matching and switching, and using these boundary bit blocks for alignment at the receive-end to restore the original bit block stream, enabling flexible bandwidth allocation and efficient transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If bit block streams are transmitted in multiple slots without separate rate adaptation, then transmission continuity is maintained, but rate flexibility and bandwidth allocation efficiency deteriorate
Solution Approach 1:
The patent segments the bit block stream into multiple slot bit block streams, each corresponding to a specific slot. Boundary bit blocks are inserted at the beginning and end of each slot bit block stream to delimit them. This segmentation enables independent rate adaptation and switching operations on each slot while maintaining overall transmission continuity, thus improving rate flexibility without excessive complexity.
Solution Approach 2:
Boundary bit blocks serve as intermediary elements that mark the beginning and end of each slot bit block stream. These boundary markers enable the system to identify and process each slot independently for rate adaptation and switching operations, while the receive-end device uses them to correctly align and restore the original bit block stream, thus facilitating slot-level flexibility without compromising system complexity.
2Manufacturing precision
If rate adaptation is performed on aggregated bit block streams, then processing simplicity is maintained, but slot-level rate control precision deteriorates
Solution Approach 1:
The patent divides the aggregated bit block stream into separate slot bit block streams with distinct boundary bit blocks. This segmentation allows rate adaptation to be performed independently on each slot with precise control over the number of idle bit blocks inserted in each slot, achieving slot-level rate control precision while keeping processing manageable through standardized boundary markers.
Solution Approach 2:
The patent applies different rate adaptation parameters to different slots by inserting a specific number of idle bit blocks into each slot bit block stream based on individual slot requirements. This local quality approach enables precise rate control for each slot (e.g., different bandwidth allocations for different services) while maintaining overall system coherence through the boundary bit block structure.
3Measurement precision
If multiple slot bit block streams are transmitted without alignment markers, then transmission efficiency is improved, but receive-end restoration accuracy deteriorates
Solution Approach 1:
Boundary bit blocks are inserted as intermediary markers at the beginning and end of each slot bit block stream. These markers enable the receive-end device to accurately identify and align the boundaries of each slot, ensuring precise restoration of the original bit block stream. The boundary markers do not significantly impact transmission efficiency as they are standardized and enable efficient parallel processing at the receive end.
Data Source
AI summary
Example methods and apparatus for processing a bit block stream are described. One example method includes obtaining a first to-be-processed bit block stream and mapping the first to-be-processed bit block stream into at least two slot bit block streams. The at least two slot bit block streams include a first slot bit block stream and a second slot bit block stream. The first slot bit block stream includes a first boundary bit block and a second boundary bit block. The second slot bit block stream includes a third boundary bit block and a fourth boundary bit block. N first bit blocks exist between the first boundary bit block and the second boundary bit block. N first bit blocks exist between the third boundary bit block and the fourth boundary bit block. The first bit block is a non-idle bit block.