Bit-Flipping Decoder Skipping for Lower Latency LDPC Decoding

Solution Overview

Problem

Error correction systems in data storage and transmission, particularly in NAND flash memory devices, face challenges in reducing decoding latency and increasing throughput while managing power consumption, especially in mobile and client SSD applications.

Innovation Solution

The implementation of a bit flipping (BF) decoder that assesses decoding parameters such as variable node degree, iteration number, and bit flipping threshold to intelligently decide whether to perform or skip the bit flipping procedure, thereby optimizing decoding latency, throughput, and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the bit flipping procedure is performed for all variable nodes in every decoding iteration, then the error correction capability is improved, but the decoding latency increases and throughput decreases

Engineering Contradiction:

Improveerror correction capabilityVSAvoiddecoding latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies partial action by selectively performing bit flipping operations only on variable nodes that meet specific criteria (degree greater than threshold, iteration number within range, bit flipping threshold comparison), rather than processing all variable nodes in every iteration. This reduces the number of operations performed while maintaining sufficient error correction capability for most cases.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the operational parameters of the bit flipping procedure by introducing dynamic thresholds and conditions based on variable node degree, iteration number, and bit flipping threshold values. By adjusting these parameters, the system adapts the decoding process to skip unnecessary operations while preserving error correction performance when needed.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the bit flipping procedure is performed for all variable nodes in every decoding iteration, then the error correction capability is improved, but the throughput decreases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidthroughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent applies partial action by selectively performing bit flipping operations only on variable nodes that meet specific criteria (degree greater than threshold, iteration number within range, bit flipping threshold comparison), rather than processing all variable nodes in every iteration. This reduces the number of operations performed while maintaining sufficient error correction capability for most cases.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the operational parameters of the bit flipping procedure by introducing dynamic thresholds and conditions based on variable node degree, iteration number, and bit flipping threshold values. By adjusting these parameters, the system adapts the decoding process to skip unnecessary operations while preserving error correction performance when needed.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If the bit flipping procedure is performed for all variable nodes in every decoding iteration, then the error correction capability is improved, but the power consumption increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by selectively performing bit flipping operations only on variable nodes that meet specific criteria (degree greater than threshold, iteration number within range, bit flipping threshold comparison), rather than processing all variable nodes in every iteration. This reduces the number of operations performed while maintaining sufficient error correction capability for most cases.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the operational parameters of the bit flipping procedure by introducing dynamic thresholds and conditions based on variable node degree, iteration number, and bit flipping threshold values. By adjusting these parameters, the system adapts the decoding process to skip unnecessary operations while preserving error correction performance when needed.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20210281278A1Improving performance of a bit flipping (BF) decoder of an error correction system

Publication Date: 2021.09.09 SK HYNIX INC

AI summary

Techniques are described for improving the decoding latency and throughput of an error correction system that includes a bit flipping (BF) decoder, where the BF decoder uses a bit flipping procedure. In an example, different decoding parameters are determined including any of a decoding number of a decoding iteration, a checksum of a codeword, a degree of a variable node, and a bit flipping threshold defined for the bit flipping procedure. Based on one or more of these decoding parameters, a decision can be generated to skip the bit flipping decoding procedure, thereby decreasing the decoding latency and increasing the decoding throughput. Otherwise, the bit flipping decoding procedure can be performed to compute a bit flipping energy and determine whether particular bits are to be flipped or not. Hence, the overall performance (e.g., bit error rate) is not significantly impacted.