Parallel Bit-Lane Communication With Redundant Error Recovery

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Solution Overview

Problem

Conventional error detection and correction mechanisms in communication systems between circuits often require complex handshaking and error correction algorithms, which can be undesirable, especially in systems with multiple parallel communication lanes.

Innovation Solution

A system that transmits data segments, error detecting codes, and redundant information over a communication link with multiple bit lanes, allowing the receiver to detect errors using the error detecting code and regenerate data using redundant information, thereby isolating failed communication lanes without complex protocols.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complex handshaking and error correction algorithms are used, then error detection and correction capability is improved, but system complexity increases

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoidhandshaking and error correction algorithm complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and transmitting syndrome information along with the data blocks. This syndrome information contains pre-computed error detection and correction data that enables the receiver to immediately detect and correct errors without engaging in complex iterative handshaking protocols. The receiver simply uses the pre-provided syndrome information to identify and correct errors in the received data blocks.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses copying by transmitting redundant syndrome information that serves as a template or reference for error detection and correction. Instead of implementing complex real-time error correction algorithms, the system creates and transmits copies of syndrome data that the receiver can directly compare against received data to identify and correct errors, significantly reducing computational complexity at the receiver端.

Inventive Principle:
Principle #26Copying

2Productivity

If multiple parallel communication lanes are used, then data transmission capacity is improved, but the difficulty of detecting and isolating failed lanes increases

Engineering Contradiction:
Improvedata transmission capacityVSAvoidfailed lane isolation difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent applies segmentation by dividing the error detection and correction process into distinct segments corresponding to individual communication lanes. Each data block is associated with specific lane identifiers and syndrome information that enables independent error analysis for each lane. This segmentation allows the receiver to identify which specific lane experienced errors without having to analyze the entire multi-lane transmission as a single unit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary element in the form of syndrome information and lane identifier data that mediates between the multiple communication lanes and the error detection logic. This intermediary data structure contains encoded information about which lanes were used and their error status, allowing the receiver to isolate failed lanes through simple comparison operations rather than complex analysis of all lanes simultaneously.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7412642B2System and method for tolerating communication lane failures
Publication Date: 2008.08.12 ORACLE AMERICAN INC
  • US7412642B2 patent drawing
  • US7412642B2 patent drawing
  • US7412642B2 patent drawing

AI summary

A system for tolerating communication lane failures includes a transmitter configured to transmit a segment of data, an error detecting code, and redundant information. The system also includes a receiver coupled to the transmitter via a communication link including a plurality of bit lanes. Each bit of the segment of data may be conveyed to the receiver serially via respective single-bit lanes. The segment of data, the redundant information, and the error detecting code may be accumulated within the receiver over a plurality of clock cycles. The receiver may detect an error in the segment of data using the error detecting code. In addition, the receiver may, in response to detecting the error, regenerate the segment of data using the redundant information. Further, the receiver may determine whether a resulting regenerated bit, along with remaining bits, of the segment of data are correct using the error detecting code.