Bit Line Bias Diode Structure for Low-Leakage 3D Memory Arrays

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Solution Overview

Problem

Conventional scaling of field effect transistors in bit line drivers for three-dimensional memory arrays leads to increased backbias threshold voltage and reduced voltage transfer efficiency, along with increased leakage current due to reduced lateral dimensions.

Innovation Solution

Employing an erase bias voltage diode in the bit line driver circuit instead of a transistor, which allows for a reduction in circuit size without increasing leakage current, using a diode with a smaller size than a field effect transistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If field effect transistors are scaled down in bit line drivers, then circuit size is reduced, but leakage current increases and voltage transfer efficiency decreases

Engineering Contradiction:
Improvecircuit sizeVSAvoidleakage current
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent changes the fundamental device type from field effect transistor to diode, altering the electrical characteristics and operating principles. Diodes inherently exhibit lower leakage current and better voltage transfer efficiency compared to scaled FETs, while maintaining compact size. This parameter change resolves the contradiction by selecting a different device class with superior electrical properties for the bit line driver application.

Inventive Principle:
Principle #35Parameter changes

2Area of moving object

If field effect transistors are scaled down in bit line drivers, then circuit size is reduced, but voltage transfer efficiency decreases

Engineering Contradiction:
Improvecircuit sizeVSAvoidvoltage transfer efficiency
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent changes the fundamental device type from field effect transistor to diode, altering the electrical characteristics and operating principles. Diodes inherently exhibit lower leakage current and better voltage transfer efficiency compared to scaled FETs, while maintaining compact size. This parameter change resolves the contradiction by selecting a different device class with superior electrical properties for the bit line driver application.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If transistors are used in bit line driver, then switching function is achieved, but circuit size is larger compared to diode

Engineering Contradiction:
Improveswitching functionVSAvoidcircuit size
Core Design Contradiction:
Ease of operationVSArea of moving object

Solution Approach 1:

The patent replaces the more complex transistor structure with a simpler diode structure. The diode, being a more basic semiconductor component with fewer internal structures, achieves the necessary switching function for bit line biasing with a smaller footprint. This substitution of a simpler component for a more complex one resolves the contradiction between switching capability and circuit size.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of an erase bias voltage diode in the bit line driver effectively switches bit lines while reducing circuit size, maintaining efficient voltage transfer and minimizing leakage current.

Implementation Method 1

Each of the unit bit-line-bias structures includes a sense amplifier connection transistor and a bit line bias diode that are both electrically connected to a respective one of the bit lines

Methodology Applied
Scientific EffectDiode: Diode

Data Source

PatentUS20250386510A1Diode containing bit line bias structure and methods for forming the same
Publication Date: 2025.12.18 SANDISK TECHNOLOGIES LLC
  • US20250386510A1 patent drawing
  • US20250386510A1 patent drawing
  • US20250386510A1 patent drawing

AI summary

A semiconductor structure includes a three-dimensional memory array including a three-dimensional array of memory elements, word lines, and bit lines, and a bit line driver including an array of unit bit-line-bias structures. Each of the unit bit-line-bias structures includes a sense amplifier connection transistor and a bit line bias diode that are both electrically connected to a respective one of the bit lines.