Bit Line Bias for Partially Programmed Block Read Operations
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Solution Overview
Problem
In memory systems, read operations on partially programmed blocks often result in errors due to differences in threshold voltages between partially and fully programmed blocks, leading to incorrect sensing signals and increased supply current usage.
Innovation Solution
The implementation of a bit line bias offset during read operations, where bit line bias offsets are determined for word line groups with similar characteristics and stored in a lookup table, allowing for adjusted bit line biases to match threshold voltage distributions of fully programmed blocks, thereby reducing errors and supply current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the same read voltage is applied to both partially programmed and fully programmed blocks, then the read operation can be performed using a unified voltage scheme, but errors occur due to threshold voltage differences between partially and fully programmed blocks
Solution Approach 1:
The patent applies different bit line bias conditions to different word line groups based on their programming status. Word line groups adjacent to unprogrammed word lines receive a first bit line bias, while other groups receive a second bit line bias. This local differentiation resolves the contradiction by maintaining read accuracy through targeted bias adjustment without requiring a completely different read scheme for partially programmed blocks.
2Device complexity
If standard read voltages are used for partially programmed blocks, then the voltage scheme remains simple and uniform, but supply current increases due to incorrect sensing signals
Solution Approach 1:
The patent selectively applies different bit line biases to specific word line groups rather than uniformly across all groups. This localized approach reduces supply current by applying higher bias only where needed (adjacent to unprogrammed word lines) while maintaining standard bias elsewhere, thus lowering overall energy consumption without significantly increasing voltage scheme complexity.
Solution Approach 2:
The patent changes the bit line bias parameter for specific word line groups based on their position relative to unprogrammed word lines. By adjusting the bit line bias voltage level locally, the patent optimizes sensing signal accuracy and reduces unnecessary current consumption, resolving the contradiction between voltage scheme simplicity and energy efficiency.
3Reliability
If bit line bias offset is applied to match threshold voltage distributions, then read errors are reduced, but device complexity increases due to additional bias management
Solution Approach 1:
The patent divides word lines into different groups based on their proximity to unprogrammed word lines. Each group receives an appropriate bit line bias level, with groups adjacent to unprogrammed word lines receiving a first bias and other groups receiving a second bias. This segmentation approach manages complexity by organizing the bias scheme in a structured, group-based manner rather than requiring individual customization for each word line.
Solution Approach 2:
The patent applies bit line bias offsets locally to specific word line groups that require them, rather than uniformly across the entire array. This localized application reduces read errors where needed while minimizing the overall complexity of bias management, as only specific regions require the additional bias adjustment.
Data Source
AI summary
Apparatuses and methods for determining performing read operations on a partially programmed block are provided. One example apparatus can include a controller configured to apply a read voltage to a first word line in the array of memory cells during a read operation on the first word line, and apply a bit line bias to a number of bit lines coupled to the first word line during the read operation on the first word line, wherein the bit line bias includes a bit line bias offset associated with performing the read operation on a partially programmed block.