Bit-Line Contact Opening Shape for Lower DRAM Contact Resistance

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Solution Overview

Problem

As the line width of dynamic random access memory (DRAM) decreases, the size of the bit-line contact structure also decreases, leading to increased contact resistance, which affects the electrical performance and yield of the semiconductor structure.

Innovation Solution

A method for forming a semiconductor structure involves creating a bit-line contact opening with a convex and concave region at its bottom, increasing the contact area and reducing contact resistance by using a specific etching process to form the bit-line contact opening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the line width of DRAM is decreased to increase integration density, then the size of the bit-line contact structure is reduced, but the contact resistance of the bit-line contact structure increases

Engineering Contradiction:

Improvesize of bit-line contact structureVSAvoidcontact resistance of bit-line contact structure

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent applies dimensionality change by transforming the bottom surface of the bit-line contact opening from a flat two-dimensional surface to a three-dimensional structure with convex and concave regions. This increases the contact area without increasing the planar footprint, thereby reducing contact resistance while maintaining the reduced contact structure size required for high-density DRAM.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies local quality by creating regions with different properties at the bottom of the contact opening. The convex region provides enhanced contact area with the underlying structure, while the concave region allows for better material filling and adhesion. This localized structural variation optimizes the contact properties specifically where needed, reducing contact resistance without affecting the overall contact structure dimensions.

Inventive Principle:

Principle #3Local quality

2Volume of moving object

If the size of the bit-line contact structure is reduced to increase integration density, then manufacturing precision requirements increase, but yield decreases

Engineering Contradiction:

Improvesize of bit-line contact structureVSAvoidyield of semiconductor structure

Core Design Contradiction:

Volume of moving objectVSProductivity

Solution Approach 1:

By utilizing the vertical dimension to create convex and concave regions, the patent increases the effective contact area without increasing the lateral dimensions. This approach allows for reduced contact structure size while maintaining manufacturing feasibility and yield, as the three-dimensional structure can be formed using standard etching and deposition processes with appropriate process control.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12205893B2Method for forming semiconductor structure and semiconductor structure

Publication Date: 2025.01.21 CHANGXIN MEMORY TECH INC

AI summary

A method for forming a semiconductor structure includes: providing a substrate, and forming a dielectric layer and a mask layer, where the mask layer is arranged with a first opening; forming a first barrier layer on a sidewall of the first opening, where the first barrier layer surrounds and forms a second opening; forming a second barrier layer filling the second opening; removing the first barrier layer and the second barrier layer by a first etching process until the first barrier layer or the second barrier layer is completely removed; and removing the dielectric layer exposed by the first opening and part of the substrate exposed by the first opening to form a bit-line contact opening.