Bit Line Contact Hole Spacer Prevents SAC Failure
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Solution Overview
Problem
Conventional self-aligned contact (SAC) formation methods in semiconductor devices often result in conductive material remaining in contact holes, leading to undesirable coupling and SAC failures during subsequent processes due to incomplete removal of bit-line-contact material in corner areas.
Innovation Solution
A semiconductor device and method that involves forming a spacer on the sidewalls of the bit line contact hole and using a liner layer to prevent conductive material from remaining, ensuring complete removal and preventing SAC failures by etching selectivity between the spacer and dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a self-aligned contact formation method is used to form stable contacts between upper and lower patterns, then contact stability is improved, but conductive material remains in corner areas of contact holes causing SAC failures
Solution Approach 1:
The patent segments the contact hole formation process into multiple steps: first forming a preliminary contact hole, then forming a mandrel, and finally forming the actual contact hole. This segmentation allows for complete removal of conductive material by creating fresh openings rather than attempting to clear corners in a single step, thus resolving the contradiction between contact stability and complete material removal.
Solution Approach 2:
The patent performs preliminary actions by forming a mandrel structure before forming the final contact hole. The mandrel serves as a template that ensures complete clearance of conductive material while maintaining precise alignment. This preliminary structuring enables subsequent contact hole formation to achieve both stability and complete material removal.
2Productivity
If the critical dimension of patterns is reduced to increase integration, then device integration is improved, but complete removal of conductive material from contact holes becomes more difficult
Solution Approach 1:
The patent transitions from a two-dimensional planar contact approach to a three-dimensional multi-step process involving mandrel formation and sequential etching. This dimensional approach allows complete material removal even as contact dimensions shrink, enabling continued device integration improvement without sacrificing complete clearance of conductive material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively prevents SAC failures by ensuring complete removal of conductive material from contact holes, enhancing the stability and reliability of semiconductor device contacts.
Implementation Method 1
forming a spacer on a sidewall of the bit line contact hole
Implementation Method 2
forming a spacer on a sidewall of the bit line contact hole
Implementation Method 3
forming a bit line contact to fill the bit line contact hole including the spacer formed in the bit line contract hole
Data Source
AI summary
A semiconductor device includes a semiconductor substrate having an active region defined by an isolation layer, a gate line defining a bit line contact region in the active region and extending in one direction, and a dielectric layer covering the semiconductor substrate and the gate line formed in the semiconductor substrate. The semiconductor device is provided with a bit line contact hole formed in the dielectric layer and exposing the bit line contact region. In order to alleviate a self-aligned contact (SAC) fails caused by a conductive material remaining in a contact hole, the semiconductor device contains a bit line contact spaced apart from a sidewall of the bit line contact hole and formed in the bit line contact hole.