Bit Line Contact Patterning With Dual-Tone Development

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Solution Overview

Problem

The existing lithography-etch-lithography-etch (LELE) approach for forming trenches in DRAM structures can deform the first pattern and damage the target layer, leading to reduced pattern correctness and adverse effects on subsequent manufacturing processes due to direct contact with etchants or chemical solvents.

Innovation Solution

A dual-tone development method involving a first exposure and developing process using a positive-tone developer, followed by a second exposure and developing process using a negative-tone developer, with complementary masks to form a target pattern, which is then used for etching to create trenches, reducing the number of steps and maintaining pattern correctness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the LELE approach is used to form trenches, then the pattern complexity can be increased, but the first pattern may be deformed and the target layer may be damaged due to direct contact with etchants or chemical solvents

Engineering Contradiction:
Improvepattern complexityVSAvoidpattern correctness
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces an intermediary protective layer between the first pattern and the etchant/chemical solvent. This protective layer prevents direct contact, thereby preventing deformation of the first pattern and damage to the target layer while still allowing the complex patterning to be achieved through the LELE approach

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the LELE approach is used to form trenches, then more precise patterning can be achieved, but the number of process steps increases and the manufacturing complexity increases

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple functions into fewer process steps. By introducing the protective layer and optimizing the sequence of operations, the patent achieves precise patterning while reducing the overall number of process steps compared to the traditional LELE approach

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces the steps required for trench formation, prevents pattern deformation, and maintains pattern correctness by using a dual-tone development approach with complementary masks, enhancing the precision and reliability of the manufacturing process.

Implementation Method 1

performing a first exposure process to expose the photosensitive layer to actinic radiation through a first mask; performing a second exposure process to expose the intermediate pattern to the actinic radiation through a second mask

Methodology Applied
Scientific EffectPhotochemical reaction: Photopolymerisation

Data Source

PatentUS20240008266A1Method of fabricating bit line contacts
Publication Date: 2024.01.04 NAN YA TECH
  • US20240008266A1 patent drawing
  • US20240008266A1 patent drawing
  • US20240008266A1 patent drawing

AI summary

The present application provides a method of fabricating bit line contacts. The method includes steps of depositing an insulative layer and a sacrificial layer on the substrate; forming a photosensitive layer on the sacrificial layer; performing a first exposure process to expose the photosensitive layer to actinic radiation through a first mask; performing a first developing process to form an intermediate pattern on the sacrificial layer; performing a second exposure process to expose the intermediate pattern to the actinic radiation through a second mask; performing a second developing process to form a target pattern on the sacrificial layer; performing a first etching process to remove portions of the sacrificial layer exposed by the target pattern; performing a second etching process to form a plurality of trenches in the insulative layer; and depositing a conductive material into the plurality of trenches to form the bit line contacts.