Non-volatile Memory Bit-Line Lockout Control
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Solution Overview
Problem
In high-capacity non-volatile memory systems, the increased number of sensing sub-cycles required to identify and shut down high-current memory cells leads to longer sensing times and noise generation due to bit-line-to-bit-line coupling, impacting performance and power efficiency.
Innovation Solution
Implementing a pull-down circuit with two pass gates that selectively locks out bit lines only when necessary, reducing the number of sensing sub-cycles and minimizing noise by enabling bit-line lockout only when the total current exceeds a predetermined level, and using a current monitor to manage bit-line lockouts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If bit-line lockout is implemented to shut down high-current memory cells, then power consumption is reduced, but sensing time increases due to additional sensing sub-cycles
Solution Approach 1:
The patent applies partial action by implementing bit-line lockout selectively rather than universally. A current monitor circuit tracks the total current on each bit line, and lockout is activated only when the current exceeds a predetermined threshold, thereby reducing power consumption only when necessary and avoiding unnecessary sensing sub-cycles that would increase sensing time
2Loss of energy
If bit-line lockout is implemented to identify high-current cells, then power efficiency improves, but noise generation increases due to bit-line-to-bit-line coupling
Solution Approach 1:
The patent applies local quality by implementing bit-line lockout on a per-bit-line basis rather than globally. The current monitor circuit independently monitors each bit line and activates lockout only for specific bit lines exceeding the current threshold, thereby improving power efficiency locally while minimizing noise generation on other bit lines that remain active
3Reliability
If sensing sub-cycles are increased to shut down high-current cells, then current control improves, but sensing performance deteriorates
Solution Approach 1:
The patent implements feedback through a current monitor circuit that continuously monitors the total current on each bit line during sensing operations. Based on this real-time feedback, the system dynamically activates bit-line lockout only when the monitored current exceeds a predetermined threshold, thereby maintaining reliable current control while minimizing the impact on sensing performance by avoiding unnecessary lockout cycles
Data Source
AI summary
In sensing a group of cells in a multi-state nonvolatile memory, multiple sensing cycles relative to different demarcation threshold levels are needed to resolve all possible multiple memory states. Each sensing cycle has a sensing pass. It may also include a pre-sensing pass or sub-cycle to identify the cells whose threshold voltages are below the demarcation threshold level currently being sensed relative to. These are higher current cells which can be turned off to achieve power-saving and reduced source bias errors. The cells are turned off by having their associated bit lines locked out to ground. A repeat sensing pass will then produced more accurate results. Circuitry and methods are provided to selectively enable or disable bit-line lockouts and pre-sensing in order to improving performance while ensuring the sensing operation does not consume more than a maximum current level.