Bit Line Structure With Dielectric Liner to Prevent Seam Voids
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Solution Overview
Problem
As semiconductor device dimensions shrink, the differing deposition rates of materials in the active region lead to seam formation and voids in the bit line structure, increasing resistance and affecting device performance.
Innovation Solution
A dielectric spacer layer is formed on the sidewalls of contact openings before depositing the conductive material, ensuring a uniform deposition rate and preventing seam formation, with the dielectric liner extending into the bit line structure to surround it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If device dimensions are shrunk to increase device density, then device density is improved, but seam formation and voids occur in the active region leading to increased resistance
Solution Approach 1:
A dielectric liner is formed on the sidewalls of contact openings before filling with conductive material. This preliminary action modifies the deposition surface to ensure uniform deposition rates, preventing seam formation and voids in the subsequently formed bit line structure while enabling continued miniaturization.
Solution Approach 2:
The dielectric liner acts as an intermediary layer between the contact opening sidewalls and the conductive material. It mediates the deposition process by providing a uniform surface that equalizes deposition rates across different materials, thereby preventing defects in the bit line structure.
2Device complexity
If conventional deposition is used without dielectric liner, then process simplicity is maintained, but seam formation occurs leading to increased bit line resistance
Solution Approach 1:
The dielectric liner serves as an intermediary that resolves the conflict between process simplicity and reliability. While it adds a process step, it prevents seam formation and voids that would otherwise increase bit line resistance, thereby improving overall device reliability with minimal added complexity.
Solution Approach 2:
The introduction of the dielectric liner changes the surface properties parameter of the contact opening sidewalls. This parameter change ensures uniform deposition rates of conductive material, preventing seam formation and reducing bit line resistance without fundamentally altering the deposition process itself.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method prevents seam formation and voids in the bit line structure, reducing resistance and improving the yield and performance of memory devices by ensuring uniform deposition and structural integrity.
Implementation Method 1
due to the different deposition rates of materials of the active region on surfaces of different compositions
Data Source
AI summary
A method for forming a semiconductor structure is provided. The method includes providing a substrate. The method further includes forming contact openings on the substrate, with sidewalls of the contact openings disposed with a dielectric liner. The method further includes forming a bit line structure on the substrate, wherein the bit line structure spans the contact openings in a first direction. The dielectric liner surrounds the bit line structure within the contact openings, and the dielectric liner extends into the bit line structure above a top surface of the substrate.