Bit Line Spacer Structure with Air Gap for Parasitic Capacitance Reduction
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Solution Overview
Problem
During the manufacturing of DRAM devices, parasitic capacitance is generated between the bit line and the capacitor contact plug, which needs to be reduced.
Innovation Solution
A semiconductor device design incorporating a bit line structure with sequentially stacked spacers, including a nitride spacer, an air spacer, and a nitride capping pattern, along with a contact plug structure that extends vertically and contacts the outer sidewall of the spacer structure, forming an air gap to minimize parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a conventional bit line structure is used without spacer structures, then the device structure is simple, but parasitic capacitance is generated between the bit line and capacitor contact plug
Solution Approach 1:
The spacer structure is divided into multiple segments: first spacer (nitride), second spacer (air), and third spacer (nitride). Each segment serves a specific function in reducing parasitic capacitance while maintaining structural integrity. The segmentation allows the air gap to be positioned precisely where it is most effective at reducing capacitance between the bit line and contact plug.
Solution Approach 2:
The air-filled second spacer acts as an intermediary dielectric material between the bit line and the capacitor contact plug. Air has a lower dielectric constant than solid materials, which effectively reduces the parasitic capacitance. The nitride spacers serve as intermediary structural elements that hold the air gap in place and provide mechanical support.
2Object-affected harmful factors
If an air gap is formed between the bit line and capacitor contact plug to reduce parasitic capacitance, then parasitic capacitance is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The spacer structures are formed preliminarily during the bit line fabrication process, before the capacitor contact plug is created. The first and third nitride spacers are deposited conformally on the bit line sidewalls, and the air gap is established in advance. This preliminary formation of the air gap structure simplifies subsequent manufacturing steps compared to creating the air gap after the contact plug is already in place.
Solution Approach 2:
The air-filled second spacer is nested between the first and third nitride spacers, creating a layered nested structure. The first spacer is deposited first, then the air gap is formed within it, and finally the third spacer is deposited to complete the nested configuration. This nesting approach allows the complex multi-material structure to be built through sequential, relatively simple deposition and etching steps.
Data Source
AI summary
A semiconductor device includes a bit line structure on a substrate, a spacer structure including a first spacer directly contacting a sidewall of the bit line structure, a second spacer directly contacting a portion of an outer sidewall of the first spacer, the second spacer including air, and a third spacer directly contacting an upper portion of the first spacer and covering an outer sidewall and an upper surface of the second spacer, and a contact plug structure extending in a vertical direction substantially perpendicular to an upper surface of the substrate and directly contacting an outer sidewall of the third spacer at least at a height between respective heights of a bottom and a top surface of the second spacer.