Bit Manipulation Instruction for RISC Processor Throughput
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Solution Overview
Problem
The execution of multiple conditional instruction groups in control codes within embedded RISC processors reduces the throughput of communication devices, as they require significant processing resources for bit manipulations.
Innovation Solution
A bit manipulation instruction is introduced, which includes a type identifier, mask identifiers, a shift factor, and control/register identifiers, allowing for conditional modification of bits in a manipulated register based on control register bits, utilizing bitwise logic circuits to optimize processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple conditional instruction groups are executed in embedded RISC processors, then programmable control codes can be tailored per communication protocol, but the throughput of the communication device is reduced
Solution Approach 1:
The patent combines multiple conditional instructions and bit manipulation operations into a single integrated conditional bit manipulation instruction. This instruction can perform multiple operations (set, clear, toggle bits) and conditional logic in one operation, reducing the total number of instructions executed and thereby improving throughput while maintaining protocol adaptability
Solution Approach 2:
The conditional bit manipulation instruction serves multiple functions: it can set, clear, or toggle specific bits based on control register conditions, apply bit shifts, and perform logical operations. This multi-functionality replaces multiple specialized instructions, reducing instruction count and improving processing efficiency for various communication protocols
2Adaptability or versatility
If conditional instruction groups are used to manipulate bits based on control bits, then protocol-specific control can be achieved, but processing resources are consumed significantly
Solution Approach 1:
The patent merges multiple conditional instructions and bit manipulation operations into a single integrated instruction structure. This reduces the number of processing steps and resources required while maintaining the ability to implement protocol-specific control logic through the conditional bit manipulation operation
3Adaptability or versatility
If multiple instructions are used for conditional bit manipulation, then flexibility in bit operations is maintained, but execution time increases
Solution Approach 1:
The patent combines multiple conditional bit manipulation operations into a single instruction that executes atomically. This reduces the total execution time by eliminating the sequential execution of multiple instructions while maintaining flexibility through the instruction's multiple operational modes and conditional logic
Data Source
AI summary
A device and a method for performing bitwise manipulation is provided. Multiple bitwise logic circuits are coupled to an instruction decoder, a register array and a rotator. Each bitwise logic circuit includes input multiplexers connected to an output multiplexer. The instruction decoder receives a bit manipulation instruction and sends to each corresponding input multiplexer a control signal based on a type of the instruction. Each input multiplexer of each bitwise logic circuit receives a control signal, a constant signal that has a value that is indifferent to the value of the mask, and a mask affected signal that has a value that is responsive to a value of an associated mask bit. Each input multiplexer selects between the constant signal and the mask affected signal based on the control signal, and outputs a selected signal. Each output multiplexer receives selected signals from each of the corresponding input multiplexers, and elects between the selected signal based on a value of an associated manipulated register bit and based on a value an associated control register bit.