Bit Matrix Compare Instruction for Data Subfield Matching

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Solution Overview

Problem

Existing computer systems require numerous instructions to compare multiple subfields of data, which is inefficient and time-consuming.

Innovation Solution

The implementation of a bit matrix compare instruction using an inclusive OR function, which allows for the comparison of multiple subfields by loading a bit matrix with subfields of a data string and a reference string, performing bit matrix operations to determine matches, and repeating the process with inverted strings to ensure accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If numerous instructions are used to compare multiple subfields of data, then comparison completeness is ensured, but processing time and instruction count increase significantly

Engineering Contradiction:
Improvecomparison completenessVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent merges multiple individual comparison operations into a single bit matrix compare instruction. Instead of executing separate instructions for each subfield comparison, the system loads multiple subfields into a bit matrix and performs a single compare operation against a reference pattern, thereby reducing instruction count and processing time while maintaining complete comparison coverage.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from comparing data fields sequentially in a linear manner to comparing them simultaneously across multiple dimensions using bit matrix operations. By representing multiple subfields as bits in a matrix structure and using parallel comparison operations, the system achieves comprehensive comparison in a single instruction cycle rather than requiring multiple sequential instructions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If multiple individual comparison instructions are executed, then data accuracy is maintained, but device complexity and instruction set size increase

Engineering Contradiction:
Improvedata accuracyVSAvoidinstruction set complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent creates a universal bit matrix compare instruction that can handle multiple comparison scenarios simultaneously. This single instruction performs the function of multiple individual comparison instructions, making the instruction set more versatile and reducing overall complexity. The instruction can compare different numbers of subfields and handle various data types through the same unified operation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If a single bit matrix compare instruction is used, then processing speed improves, but the complexity of implementing the comparison logic increases

Engineering Contradiction:
Improveprocessing speedVSAvoidimplementation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by loading the bit matrix with subfield data and preparing the reference pattern before executing the compare instruction. This pre-processing step simplifies the actual comparison operation, allowing the hardware to execute a simple single-cycle comparison rather than complex logic. The bit matrix structure itself is pre-configured to handle the comparison requirements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9547474B2Inclusive or bit matrix to compare multiple corresponding subfields
Publication Date: 2017.01.17 CRAY INC
  • US9547474B2 patent drawing
  • US9547474B2 patent drawing
  • US9547474B2 patent drawing

AI summary

A computer system is operable to identify subfields that differ in two data elements using a bit matrix compare function between a first matrix filled with pattern elements and a reference pattern.