Bit Pattern Matching Hardware Prefetcher for Complex Access Patterns

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Solution Overview

Problem

Current prefetchers are limited in detecting complex repeating patterns and confirming prefetches, leading to inefficiencies in cache memory access and performance optimization, as they primarily rely on single stride detection and lack dynamic distance adjustment.

Innovation Solution

A bit pattern matching (BPM) hardware prefetcher (HWPF) that captures complex patterns, allows out-of-order training and confirmation, and dynamically adjusts prefetch distance based on demand requests, using bitmap structures to track past memory accesses and generate prefetch requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a stride-type hardware prefetcher is used to detect single stride patterns, then simple access patterns can be detected, but complex repeating patterns cannot be captured

Engineering Contradiction:
Improvepattern detection capabilityVSAvoidprefetcher architecture
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The prefetcher architecture is segmented into multiple independent pattern detection units, each capable of detecting specific pattern types (stride patterns, repeating patterns, complex access patterns). This segmentation allows the system to handle diverse access patterns while keeping each individual detection unit relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The prefetcher is designed with multi-functional pattern detection capabilities that can identify multiple types of access patterns (single stride, complex repeating, and other patterns) using a unified architecture. This universal design eliminates the need for separate specialized hardware for each pattern type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If prefetch requests are issued based on simple stride detection, then prefetching can be performed, but prefetch distance cannot be dynamically adjusted

Engineering Contradiction:
Improveprefetch efficiencyVSAvoiddynamic distance adjustment
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The prefetcher implements dynamic distance adjustment by continuously monitoring access patterns and adapting the prefetch distance based on the detected pattern characteristics. The system transitions from static fixed-distance prefetching to dynamic adaptive prefetching that responds to actual workload requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The prefetcher incorporates feedback mechanisms that monitor the effectiveness of prefetch requests and use this information to adjust future prefetch behavior. The system learns from past performance and dynamically optimizes prefetch distance based on observed access patterns and cache hit rates.

Inventive Principle:
Principle #23Feedback

3Reliability

If traditional prefetchers are used without out-of-order confirmation, then prefetching can proceed, but prefetch accuracy cannot be verified in complex access patterns

Engineering Contradiction:
Improveprefetch accuracyVSAvoidconfirmation mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The prefetcher issues preliminary prefetch requests based on detected patterns before the actual data is needed, and then verifies these prefetches through out-of-order confirmation mechanisms. This allows the system to proactively fetch data and subsequently validate whether the prefetch was accurate, even when accesses occur out of order.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The out-of-order confirmation mechanism provides feedback on prefetch accuracy by tracking whether prefetched data was actually used and when it was used. This feedback loop enables the prefetcher to learn from confirmation results and improve future prefetch accuracy for complex access patterns.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20240184581A1Bit pattern matching hardware prefetcher
Publication Date: 2024.06.06 SIFIVE INC
  • US20240184581A1 patent drawing
  • US20240184581A1 patent drawing
  • US20240184581A1 patent drawing

AI summary

Described herein is a bit pattern matching hardware prefetcher which captures complex repeating patterns, allows out-of-order (OOO) training, and allows OOO confirmations. The prefetcher includes a plurality of prefetch engines. Each prefetch engine is associated with a zone, each zone has a plurality of subzones, and each subzone has a plurality of cache lines. The prefetcher includes an access map for each subzone. Each bit position represents a cache line in the plurality of cache lines. The prefetcher determines whether a demand request matches one of the plurality of prefetch engines, updates, with respect to the demand request, a bit position in an access map for a subzone in a matching prefetch engine, determines a pattern from an access map for a subzone when a defined number of demand requests have been matched to the subzone; and generates a prefetch request based on at least the determined pattern.