Bit Plane Dithering for Display Color Contouring Reduction

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Solution Overview

Problem

Display systems suffer from color contouring due to uniform color shades in adjacent pixels, leading to reduced image quality and viewer experience, which existing technologies fail to mitigate effectively.

Innovation Solution

A system and method that introduces dither noise to bit planes of image frames, allowing for real-time generation and application of dithered bit planes with adjustable dither noise patterns, independent of frame rate, to increase gray shades and reduce detectable noise perception.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dither noise is introduced to bit planes to increase gray shades and reduce color contouring, then image quality is improved, but dither noise perceptibility increases

Engineering Contradiction:
Improveimage qualityVSAvoiddither noise perceptibility
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting dither noise characteristics (amplitude, frequency, spatial distribution) based on image content analysis. The system modifies dither parameters adaptively across different regions and depth planes to minimize perceptibility while maintaining color contouring mitigation benefits

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extends dithering from traditional 2D spatial domain to 3D color volume space by applying dither noise across multiple bit planes representing different color components and depth levels. This dimensional extension allows noise distribution in color space rather than just spatial space, reducing perceptibility

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If traditional dithering methods are used to mitigate color contouring, then image quality improves, but memory size and processing latency increase

Engineering Contradiction:
Improveimage qualityVSAvoidmemory size and latency
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the image processing into depth-based layers (bit planes) and applies dithering independently to each segment. This segmentation allows parallel processing of different depth planes, reducing overall processing latency and memory requirements compared to full-image dithering

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary depth estimation and bit plane separation before dithering application. By pre-organizing image data into depth-stratified bit planes, the system eliminates the need for large buffers and reduces processing latency during the actual dithering operation

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240371342A1Bit plane dithering apparatus
Publication Date: 2024.11.07 TEXAS INSTRUMENTS INC
  • US20240371342A1 patent drawing
  • US20240371342A1 patent drawing
  • US20240371342A1 patent drawing

AI summary

A system, includes a controller configured to obtain, for an image frame stored in a frame memory image, data associated with a color component and generate dithered bit planes having a dither noise pattern, the dithered bit planes including time repeated bit plane sequences in the image frame. The system also includes a spatial light modulator (SLM) coupled to the controller. The SLM is configured to project an image of the image frame according to the dithered bit planes. Additionally, the system includes a light source optically coupled to the SLM. The light source is configured to provide light for projecting the image.