Bit Rate Adaptation via Parallel Control Signals in Processing Modules

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Solution Overview

Problem

Existing data processing flow solutions face challenges in managing bit rate adaptation, particularly when multiple bit rate adaptation functions are series-connected, leading to unpredictable time behavior and increased hardware costs, power dissipation, and complex architecture.

Innovation Solution

A dedicated processing module with a control device that propagates control signals in parallel with data signals, allowing each module to synchronize with its predecessors and successors, reducing unnecessary data transfers and current consumption by managing block requests and validation signals efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple bit rate adaptation functions are connected in series in a data processing flow, then the processing capability is improved, but the time behavior becomes unpredictable and hardware implementation becomes difficult

Engineering Contradiction:
Improveprocessing capabilityVSAvoidhardware implementation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the data processing flow into multiple independent processing modules, each capable of autonomous operation with its own control device. This segmentation allows each module to manage bit rate adaptation independently, maintaining predictable timing behavior while preserving overall processing capability. The control device in each module can autonomously manage block requests and validation signals without requiring complex coordination between series-connected functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control device dynamically adjusts the operation of processing modules based on real-time block requests and validation signals. This dynamic control enables the system to adapt to varying data rates and processing requirements while maintaining predictable timing through centralized coordination, rather than requiring complex static hardware configurations for multiple series-connected functions.

Inventive Principle:
Principle #15Dynamics

2Ease of manufacture

If software management is used for bit rate adaptation, then development and debugging become easier, but hardware costs and power dissipation increase

Engineering Contradiction:
Improvedevelopment easeVSAvoidpower dissipation
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

Each processing module is equipped with its own control device that autonomously manages block requests and validation signals without requiring continuous software intervention. This self-service capability reduces the need for high-power general-purpose processors while maintaining the ease of development through modular design. The control devices handle bit rate adaptation independently, reducing overall system power consumption compared to software-managed solutions.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If a general use processor is used to implement all functions, then versatility is improved, but hardware cost and processing speed decrease

Engineering Contradiction:
Improvefunctional versatilityVSAvoidprocessing speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The control device is designed as a universal component that can manage multiple processing modules with different functions. This universal control mechanism allows the system to achieve functional versatility through a single module type that can be configured for different processing tasks, while maintaining high processing speed through hardware-level autonomous operation of each module.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If internal cache and external storage are used for data blocks, then storage capacity is improved, but response time and power dissipation increase

Engineering Contradiction:
Improvestorage capacityVSAvoidresponse time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent extracts the data storage function from the processing modules and places it in external storage, while the control devices manage data flow autonomously. This extraction allows processing modules to operate without waiting for cache/storage operations, improving response time. The control devices coordinate block requests and validation signals to manage data transfer efficiently, reducing the impact of storage access delays on processing speed.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7392332B2Bit rate adaptation in a data processing flow
Publication Date: 2008.06.24 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
  • US7392332B2 patent drawing
  • US7392332B2 patent drawing
  • US7392332B2 patent drawing

AI summary

A dedicated processing module includes an input for data to be processed and an output for processed data. A block input and a block output are also included. A processing component for the module performs a digital processing operation on the data present at the data input and applies the processed data at the data output. The processor may further generate a block request. A control device within the module reproduces, at the block output, a block request applied to the block input or generated by the processing component. The control device thus may operate to block the application of processed data at the data output upon receipt of a block request at the block input. Two or more dedicated processing modules may be connected in series with each other to form a processing flow chain with the data output of one module connected to the data input of a subsequent module. Additionally, the block output of the subsequent module is connected to the block input of the preceding module.