Bit Reordering and Inversion for Data Bus Transition Reduction

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Solution Overview

Problem

Current data communication systems face challenges in reducing power consumption and noise due to high bit transitions, which cause fluctuations in supply current and induce noise, especially when transmitting multiple bits in parallel.

Innovation Solution

The system modifies the order of data transmission by performing skip operations and uses data bus inversion (DBI) to minimize bit transitions per bit time, thereby reducing power consumption and noise. This is achieved by reordering bits in the data stream and applying conditional inversion operations, with additional bit lanes managing skip and inversion signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is transmitted with high bit transitions to increase throughput, then data transmission speed is improved, but power consumption increases and noise is generated

Engineering Contradiction:
Improvedata transmission speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies Data Bus Inversion (DBI) which conditionally inverts data bits based on the number of transitions detected. When transition count exceeds a threshold, inversion is applied to reduce transitions. This dynamically changes the data transmission parameter (bit pattern) to optimize between speed and power consumption by reducing supply current fluctuations.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If data bus inversion is applied to reduce bit transitions, then power consumption is reduced, but system complexity increases due to additional control logic

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent counts bit transitions in advance before transmission and makes inversion decisions based on pre-calculated transition thresholds. The DBI logic evaluates the incoming data pattern, determines if inversion is needed, and applies the transformation before data is placed on the bus. This preliminary evaluation approach simplifies the overall control structure by making inversion decisions based on straightforward transition counting rather than complex real-time optimization.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If bit transitions are reduced to minimize noise, then noise is reduced, but data transmission efficiency may be compromised

Engineering Contradiction:
ImprovenoiseVSAvoiddata transmission efficiency
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

The patent dynamically changes data representation parameters by applying conditional inversion based on transition thresholds. When the data pattern would cause excessive transitions (and thus noise), inversion transforms the bits to reduce transitions while maintaining the same information content. The receiver applies corresponding de-inversion to recover original data, ensuring no information loss and maintaining transmission efficiency.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9219509B1System performance improvement using data reordering and/or inversion
Publication Date: 2015.12.22 RAMBUS INC
  • US9219509B1 patent drawing
  • US9219509B1 patent drawing
  • US9219509B1 patent drawing

AI summary

A system and method for reordering transmitted bits to minimize the number of bit transitions per bit time, reducing system power consumption and signaling noise. Bit reordering is accomplished by performing skip operations, where to-be-transmitted bits are replaced by one or more bits in the bit stream at given bit times. DBI may be used in addition, or as an alternative, to bit reordering to further minimize the number of bit transitions per bit time. A receiver performs operations necessary to restore bits to their original sequence and/or recover the bits in their non-inverted form.