Bit-Shift Error Detection Using Segmented Cyclic Patterns
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Solution Overview
Problem
Communication systems face difficulties in detecting bit-shift errors during data transmission, which can lead to incorrect receipt of data, as the existing PRBS pattern generation and comparison methods fail to accurately identify such errors.
Innovation Solution
The proposed solution involves a data communication system with a transmitter and receiver that utilize cyclic pattern generation and bit-sequence alteration circuits to generate and compare altered bit-sequences, allowing for detection of bit-shift errors by comparing bit-sequence altered and restored parallel data streams with reference patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PRBS pattern generation and comparison methods are used, then the system structure remains simple, but bit-shift errors cannot be detected
Solution Approach 1:
The patent segments the bit sequence into multiple patterns by dividing the PRBS into N-bit patterns where N is less than the word width M. This segmentation allows the system to detect bit-shift errors by comparing segmented patterns, as each segment can be independently verified against expected values, thereby improving error detection capability without requiring complete pattern regeneration.
Solution Approach 2:
The patent performs preliminary action by pre-calculating and storing expected pattern values in a lookup table before the actual data transmission occurs. During transmission, the system only needs to compare received segmented patterns against these pre-stored expectations, which simplifies the real-time processing requirements and enables reliable error detection without complex on-the-fly pattern generation.
2Reliability
If PRBS patterns are generated and compared to detect errors, then data reception reliability improves, but the comparison process becomes complex
Solution Approach 1:
The patent divides the complex comparison process into smaller segments by processing N-bit patterns at a time rather than comparing entire M-bit words. This segmentation reduces the complexity of each individual comparison operation while maintaining overall reliability, as each segmented comparison can be performed independently and efficiently.
Solution Approach 2:
The patent uses a lookup table that stores pre-generated expected pattern values as copies. Instead of performing complex real-time pattern generation and comparison, the system simply retrieves pre-computed pattern copies from the lookup table and compares them with received data, significantly simplifying the comparison process while ensuring accurate error detection.
3Measurement precision
If bit sequences are altered and restored for error detection, then detection precision improves, but the processing steps increase
Solution Approach 1:
The patent applies segmentation by dividing the bit sequence into N-bit patterns where N < M, allowing the system to alter and restore smaller segments independently. This reduces the processing burden on each step while maintaining precision, as each segmented pattern can be processed through alteration and restoration operations without requiring processing of the entire M-bit word.
Solution Approach 2:
The patent utilizes parameter changes by varying the pattern length parameter N to be less than the word width M. This parameter change enables the system to process and compare smaller pattern units, which simplifies the alteration and restoration processing steps while maintaining detection precision through the segmented comparison approach.
Data Source
AI summary
A transmitter cyclic pattern having a pattern length of N bits is generated and converted into an M-bit transmitter parallel data stream, where N≠M. A bit-sequence altered transmitter parallel data stream is generated by performing a transmitter altering process, converted into a serial data and transmitted together with a clock signal. The serial data is received and converted into an M-bit receiver parallel data stream, and a bit-sequence restored parallel data stream is generated by performing a process opposite to the transmitter altering process. A receiver cyclic pattern is generated by using bits in the bit-sequence restored parallel data stream and converted into an M-bit reference parallel data stream, and a bit-sequence altered reference parallel data stream is generated by performing a process same as the transmitter altering process and compared with the received parallel data to test if the data is correctly received.