Bit and Signal Level Mapping for Multi-Symbol Memory
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Solution Overview
Problem
Memory devices face issues with noise interference and errors due to maximum transitions in multi-symbol signals, which can lead to incorrect data processing and assignment of incorrect bit values.
Innovation Solution
Implementing a bit and signal level mapping technique that uses a modulation scheme to map CRC output bits to physical levels, avoiding maximum transitions by separating them by one or more physical levels, thereby reducing noise and interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If maximum transitions are used in multi-symbol signals, then data transmission speed is improved, but noise interference and errors increase
Solution Approach 1:
The patent changes the parameter of signal transition by mapping specific bit patterns to specific physical signal levels. Instead of allowing any transition, the mapping scheme restricts transitions to avoid maximum transitions (between highest and lowest signal levels), thereby reducing noise interference while maintaining data transmission capability.
Solution Approach 2:
The patent applies different mapping rules to different bit patterns. Specifically, certain bit combinations are mapped to signal levels that avoid maximum transitions, while other bit patterns may use different mapping strategies. This local differentiation allows the system to minimize noise for critical transitions while maintaining overall transmission efficiency.
2Object-affected harmful factors
If maximum transitions are avoided in multi-symbol signals, then noise interference is reduced, but data transmission efficiency decreases
Solution Approach 1:
The mapping scheme serves multiple functions simultaneously: it encodes data bits into signal levels, avoids maximum transitions to reduce noise, and maintains a systematic structure that allows efficient decoding. This multi-functionality resolves the contradiction by making the same mapping mechanism serve both noise reduction and transmission efficiency goals.
Solution Approach 2:
The patent employs a dynamic mapping approach where the relationship between bits and signal levels is determined by the current signal state and the desired transition constraints. This dynamic mapping allows the system to adaptively choose signal levels that avoid maximum transitions while still transmitting data efficiently, rather than using a static one-to-one mapping.
3Device complexity
If bit values are assigned without considering signal level transitions, then mapping simplicity is improved, but error rates increase due to incorrect bit assignment
Solution Approach 1:
The patent performs preliminary action by establishing a predefined mapping scheme before data transmission. This mapping scheme pre-determines which bit patterns correspond to which signal level transitions, ensuring that maximum transitions are avoided while maintaining systematic and reliable bit assignment. The preliminary establishment of rules prevents errors during actual transmission.
Solution Approach 2:
The mapping scheme acts as an intermediary layer between the data bits and the physical signal levels. Instead of directly assigning bits to signal levels without constraints, the mapping scheme mediates this assignment by incorporating transition constraints, thereby ensuring both reliability in bit assignment and reduced noise interference.
Data Source
AI summary
Methods, systems, and devices for bit and signal level mapping are described to enable a memory device to transmit or receive a multi-symbol signal that includes more than two (2) physical levels. Some cyclic redundancy check (CRC) calculations may generate one or more bits of CRC output per symbol of an associated signal and the output may be transmitted via a multi-symbol signal by converting one or more CRC output bit to a physical level of the signal. The conversion, or mapping, process may be performed such that the physical levels of the signal avoid a transition between a highest physical level and lowest physical level. For example, a modulation scheme or mapping process may be configured to map different values of CRC output bits to different physical levels, where the different physical levels are separated by one other physical level associated with the signal or the modulation scheme.